URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_21/] [sim/] - Rev 342

Rev	Log message	Author	Age	Path
338		root	5540d 03h	/ethmac/tags/rel_21/sim
335	New directory structure.	root	5597d 08h	/ethmac/tags/rel_21/sim
300	This commit was manufactured by cvs2svn to create tag 'rel_21'.		7625d 06h	/ethmac/tags/rel_21/sim
299	Artisan RAMs added.	mohor	7625d 06h	/ethmac/tags/rel_21/sim
295	Few minor changes.	tadejm	7632d 04h	/ethmac/tags/rel_21/sim
294	Added path to a file with distributed RAM instances for xilinx.	tadejm	7634d 05h	/ethmac/tags/rel_21/sim
293	initial.	tadejm	7658d 02h	/ethmac/tags/rel_21/sim
292	Corrected mistake.	tadejm	7658d 02h	/ethmac/tags/rel_21/sim
291	initial	tadejm	7658d 03h	/ethmac/tags/rel_21/sim
290	Additional checking for FAILED tests added - for ATS.	tadejm	7658d 04h	/ethmac/tags/rel_21/sim
225	Some minor changes.	tadejm	7931d 02h	/ethmac/tags/rel_21/sim
224	Signals for a wave window in Modelsim.	tadejm	7931d 04h	/ethmac/tags/rel_21/sim
217	Bist supported.	mohor	7938d 04h	/ethmac/tags/rel_21/sim
215	Bist supported.	mohor	7938d 05h	/ethmac/tags/rel_21/sim
208	Virtual Silicon RAMs moved to lib directory	tadej	7955d 23h	/ethmac/tags/rel_21/sim
207	Virtual Silicon RAM support fixed	tadej	7955d 23h	/ethmac/tags/rel_21/sim
206	Virtual Silicon RAM added to the simulation.	mohor	7955d 23h	/ethmac/tags/rel_21/sim
205	ETH_VIRTUAL_SILICON_RAM supported.	mohor	7955d 23h	/ethmac/tags/rel_21/sim
187	_info file added.	mohor	7961d 22h	/ethmac/tags/rel_21/sim
186	Macro for testbench (DO file).	mohor	7961d 23h	/ethmac/tags/rel_21/sim