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[/] [ethmac/] [tags/] [rel_22/] - Rev 124

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Rev Log message Author Age Path
124 Define ETH_MIIMODER_RST corrected to 0x00000400. mohor 7987d 03h /ethmac/tags/rel_22
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 7989d 04h /ethmac/tags/rel_22
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 7989d 04h /ethmac/tags/rel_22
120 Unused files removed. mohor 7989d 05h /ethmac/tags/rel_22
119 Ram , used for BDs changed from generic_spram to eth_spram_256x32. mohor 7989d 05h /ethmac/tags/rel_22
118 ShiftEnded synchronization changed. mohor 7992d 20h /ethmac/tags/rel_22
117 Clock mrx_clk set to 2.5 MHz. mohor 7993d 07h /ethmac/tags/rel_22
116 Testing environment also includes traffic cop, memory interface and host
interface.		 mohor 7993d 07h /ethmac/tags/rel_22
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 7994d 05h /ethmac/tags/rel_22
114 EXTERNAL_DMA removed. External DMA not supported. mohor 7995d 02h /ethmac/tags/rel_22
113 RxPointer bug fixed. mohor 8001d 18h /ethmac/tags/rel_22
112 Previous bug wasn't succesfully removed. Now fixed. mohor 8002d 08h /ethmac/tags/rel_22
111 Master state machine had a bug when switching from master write to
master read.		 mohor 8002d 21h /ethmac/tags/rel_22
110 m_wb_cyc_o signal released after every single transfer. mohor 8003d 00h /ethmac/tags/rel_22
109 Comment removed. mohor 8003d 01h /ethmac/tags/rel_22
108 Testbench supports unaligned accesses. mohor 8070d 10h /ethmac/tags/rel_22
107 TX_BUF_BASE changed. mohor 8070d 10h /ethmac/tags/rel_22
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8070d 11h /ethmac/tags/rel_22
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.		 mohor 8079d 12h /ethmac/tags/rel_22
104 FCS should not be included in NibbleMinFl. mohor 8081d 06h /ethmac/tags/rel_22

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