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[/] [ethmac/] [tags/] [rel_23/] [sim/] [rtl_sim] - Rev 295

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Rev Log message Author Age Path
295 Few minor changes. tadejm 7617d 19h /ethmac/tags/rel_23/sim/rtl_sim
294 Added path to a file with distributed RAM instances for xilinx. tadejm 7619d 19h /ethmac/tags/rel_23/sim/rtl_sim
293 initial. tadejm 7643d 16h /ethmac/tags/rel_23/sim/rtl_sim
292 Corrected mistake. tadejm 7643d 16h /ethmac/tags/rel_23/sim/rtl_sim
291 initial tadejm 7643d 18h /ethmac/tags/rel_23/sim/rtl_sim
290 Additional checking for FAILED tests added - for ATS. tadejm 7643d 19h /ethmac/tags/rel_23/sim/rtl_sim
225 Some minor changes. tadejm 7916d 17h /ethmac/tags/rel_23/sim/rtl_sim
224 Signals for a wave window in Modelsim. tadejm 7916d 18h /ethmac/tags/rel_23/sim/rtl_sim
217 Bist supported. mohor 7923d 19h /ethmac/tags/rel_23/sim/rtl_sim
215 Bist supported. mohor 7923d 20h /ethmac/tags/rel_23/sim/rtl_sim
208 Virtual Silicon RAMs moved to lib directory tadej 7941d 13h /ethmac/tags/rel_23/sim/rtl_sim
207 Virtual Silicon RAM support fixed tadej 7941d 13h /ethmac/tags/rel_23/sim/rtl_sim
206 Virtual Silicon RAM added to the simulation. mohor 7941d 13h /ethmac/tags/rel_23/sim/rtl_sim
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7941d 14h /ethmac/tags/rel_23/sim/rtl_sim
187 _info file added. mohor 7947d 13h /ethmac/tags/rel_23/sim/rtl_sim
186 Macro for testbench (DO file). mohor 7947d 13h /ethmac/tags/rel_23/sim/rtl_sim
185 Directory keeper. mohor 7947d 14h /ethmac/tags/rel_23/sim/rtl_sim
184 Modelsim simulation environment should be ready now. mohor 7947d 14h /ethmac/tags/rel_23/sim/rtl_sim
183 Modelsim environment added. mohor 7947d 14h /ethmac/tags/rel_23/sim/rtl_sim
176 lists changed to new directory structure mohor 7951d 19h /ethmac/tags/rel_23/sim/rtl_sim

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