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[/] [ethmac/] [trunk/] - Rev 240

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Rev Log message Author Age Path
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7877d 11h /ethmac/trunk
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7877d 11h /ethmac/trunk
238 Defines fixed to use generic RAM by default. mohor 7889d 15h /ethmac/trunk
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7891d 20h /ethmac/trunk
235 rev 4. mohor 7892d 11h /ethmac/trunk
234 Figure list assed to the revision 3. mohor 7892d 19h /ethmac/trunk
233 Revision 0.3 released. Some figures added. mohor 7892d 19h /ethmac/trunk
232 fpga define added. mohor 7897d 14h /ethmac/trunk
231 Description of Core Modules added (figure). mohor 7899d 16h /ethmac/trunk
229 case changed to casex. mohor 7903d 12h /ethmac/trunk
227 Changed BIST scan signals. tadejm 7903d 16h /ethmac/trunk
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7903d 18h /ethmac/trunk
225 Some minor changes. tadejm 7903d 18h /ethmac/trunk
224 Signals for a wave window in Modelsim. tadejm 7903d 19h /ethmac/trunk
223 Some code changed due to bug fixes. tadejm 7903d 19h /ethmac/trunk
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 7907d 17h /ethmac/trunk
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.		 mohor 7910d 18h /ethmac/trunk
218 Typo error fixed. (When using Bist) mohor 7910d 20h /ethmac/trunk
217 Bist supported. mohor 7910d 20h /ethmac/trunk
216 Bist signals added. mohor 7910d 20h /ethmac/trunk

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