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[/] [open8_urisc/] - Rev 311

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Rev Log message Author Age Path
311 Updated documentation to reflect generic switch controlling ROR/ROL behavior and the carry bit jshamlet 448d 18h /open8_urisc
310 Added optional DACadv signal to advance the PWM engine using an external signal. This is used to synchronize the DAC with other DACs or for streaming multiple streams across a high-speed serial link. jshamlet 475d 23h /open8_urisc
309 Comment cleanup jshamlet 486d 07h /open8_urisc
308 jshamlet 497d 14h /open8_urisc
307 Fixed comments on o8_version.vhd jshamlet 704d 23h /open8_urisc
306 Moved REINIT_TASK_TABLE_PTR call to INITIALIZE_TASK_STACK jshamlet 709d 01h /open8_urisc
305 More code cleanup - rearranged macros and moved stack init to separate macro jshamlet 709d 01h /open8_urisc
304 Modified TASK_SETUP to use the same macros as the rest of the task switcher and cleaned up the code some more. jshamlet 709d 01h /open8_urisc
303 Fixed working, but "incorrect" code (constants were right, but were named incorrectly jshamlet 709d 13h /open8_urisc
302 Corrected issue where register state wasn't being preserved for user function stubs,
Modified FREEMEM calc to use the region size constant.		 jshamlet 709d 13h /open8_urisc
301 Adding actual task manager files jshamlet 711d 11h /open8_urisc
300 Adding core task manager assembly jshamlet 711d 11h /open8_urisc
299 Modified the status_led.vhd to slow down the DIM50PCT signal to 1/32 instead of 1/2 for use with shift-register based discrete LEDs and added the ability to chain the toggle signal to save on resources as well as synchronize the "toggling" jshamlet 713d 11h /open8_urisc
298 Fixed a long-standing bug in the SBC instruction where the 1 wasn't being added to complete the 2's complement of Rn. This was causing off-by-one errors in subtraction and negating carry only subtractions. jshamlet 714d 13h /open8_urisc
297 Fixed register map comments jshamlet 1004d 21h /open8_urisc
296 Removed parallel interface from o8_vector_rx.vhd, modified vector_tx.vhd to use a generic for it's seed value, slight formatting change on o8_elapsed_usec.vhd. jshamlet 1013d 13h /open8_urisc
295 Undoing previous revision. UART was fine, bug reporter was not. jshamlet 1016d 16h /open8_urisc
294 Fixed an ancient bug in the parity logic that had the parity inverted. jshamlet 1016d 21h /open8_urisc
293 Fixed formatting issue in o8_sync_serial where tabs were inserted instead of spaces and fixed column spacing as a result (purely cosmetic) jshamlet 1035d 21h /open8_urisc
292 Updated the o8_trig_delay entity by:
1) Added a global interrupt enable,
2) Added the ability to trigger on both the pre- and post-arm trigger input
3) Added the ability to read the external input on offset 7		 jshamlet 1106d 21h /open8_urisc

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