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[/] [open_hitter/] [trunk/] - Rev 23

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23 better - root cause of synth issues was switch de-bounce. Working through remaining tests stvhawes 3365d 20h /open_hitter/trunk
22 mixed rising_edge / falling_edge logic removed stvhawes 3371d 12h /open_hitter/trunk
21 flakey sim bugs (1/10 test 2 fails) stvhawes 3371d 14h /open_hitter/trunk
20 search_control_sim prepped stvhawes 3378d 09h /open_hitter/trunk
19 search_control is up for simulation (ghdl) - tidied extra testbenches stvhawes 3385d 09h /open_hitter/trunk
18 search_control is up for simulation (ghdl) stvhawes 3385d 09h /open_hitter/trunk
17 persistent bug: search_control_wrapper.vhd:230:21:@36us:(assertion error): search_control_wrapper: test: 3 bad id stvhawes 3390d 20h /open_hitter/trunk
16 minor fixes to search_control test bench stvhawes 3397d 06h /open_hitter/trunk
15 adding in search_control and testbench stvhawes 3398d 11h /open_hitter/trunk
14 search_item_wrapper bench debugged stvhawes 3404d 07h /open_hitter/trunk
13 test bench for search_item stvhawes 3407d 11h /open_hitter/trunk
12 wrapper test for search_item stvhawes 3412d 21h /open_hitter/trunk
11 multiplex searh item added stvhawes 3413d 14h /open_hitter/trunk
10 split source files to sime and rtl stvhawes 3427d 13h /open_hitter/trunk
9 highlevel block diagram added stvhawes 3428d 10h /open_hitter/trunk
8 sim sequence error fixed, so 20% success -> 100% success for unit test on fpga stvhawes 3428d 12h /open_hitter/trunk
7 split clock/byte_ready and fix logic stvhawes 3433d 05h /open_hitter/trunk
6 fixing synthesizable stvhawes 3434d 14h /open_hitter/trunk
5 fixing synthesizable stvhawes 3434d 18h /open_hitter/trunk
4 developing ideas around unit test / fpga verification stvhawes 3435d 06h /open_hitter/trunk

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