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[/] [openmsp430/] [trunk/] [fpga/] - Rev 167

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167 Update LX9 Microboard FPGA example.
It now includes a dual-core oMSP system with a shared 16kB program memory.
Each core has its own 2kB data memory and an additional 2kB shared data memory.		 olivier.girard 4217d 20h /openmsp430/trunk/fpga
165 Add missing I2C address in the README file. olivier.girard 4231d 20h /openmsp430/trunk/fpga
162 Add some more SVN ignore patterns.
Update testbench.		 olivier.girard 4269d 19h /openmsp430/trunk/fpga
161 add some SVN ignore patterns olivier.girard 4269d 19h /openmsp430/trunk/fpga
157 Re-create new LX9 Microboard project to show off the new I2C serial debug interface (and more to come).... olivier.girard 4269d 19h /openmsp430/trunk/fpga
156 Remove current LX9 microboard project (to be replaced with a new one showing off the new I2C based serial debug interface) olivier.girard 4269d 19h /openmsp430/trunk/fpga
155 Update FPGA projects with the latest openMSP430 verilog code. olivier.girard 4269d 19h /openmsp430/trunk/fpga
153 Update XFLOW scripts to bring more automation.
Several bitstreams are now checked in for direct use.		 olivier.girard 4324d 18h /openmsp430/trunk/fpga
151 Add possibility to configure custom Program, Data and Peripheral memory sizes. olivier.girard 4354d 18h /openmsp430/trunk/fpga
149 Update simulation regression result parser.
Fixed failing SFR test (due to newer MSPGCC version).
Implement request http://opencores.org/bug,view,2171 (burst accesses through the serial debug interface)		 olivier.girard 4357d 21h /openmsp430/trunk/fpga
143 Update FPGA software examples to support MSPGCC Uniarch. olivier.girard 4428d 21h /openmsp430/trunk/fpga
138 Update simulation scripts to support Cygwin out of the box for Windows users. olivier.girard 4445d 06h /openmsp430/trunk/fpga
136 Update all FPGA projects with the latest core version. olivier.girard 4476d 20h /openmsp430/trunk/fpga
132 Update FPGA examples with the POP.B bug fix olivier.girard 4489d 20h /openmsp430/trunk/fpga
128 Fixed CALL x(SR) bug (see Bugtracker http://opencores.org/bug,view,2111 ) olivier.girard 4573d 20h /openmsp430/trunk/fpga
121 Add a new FPGA example for the LX9 Microboard from Avnet.
Many thanks to Ricardo Ribalda Delgado for his contribution on this one :-)		 olivier.girard 4717d 21h /openmsp430/trunk/fpga
112 Modified comment. olivier.girard 4782d 20h /openmsp430/trunk/fpga
111 Re-organized the "openMSP430_defines.v" file.
Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.		 olivier.girard 4783d 20h /openmsp430/trunk/fpga
109 Update Xilinx FPGA example with the latest openMSP430 core RTL version. olivier.girard 4838d 05h /openmsp430/trunk/fpga
108 Add serial debug interface tasks to the Actel fpga simulation environment. olivier.girard 4839d 18h /openmsp430/trunk/fpga

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