OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] - Rev 435

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
435 ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality.
julius 4953d 10h /openrisc
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 4956d 16h /openrisc
433 New single program interrupt test programs. jeremybennett 4957d 18h /openrisc
432 Updates to handle interrupts correctly. jeremybennett 4957d 19h /openrisc
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.
julius 4959d 18h /openrisc
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 4960d 15h /openrisc
429 or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions.
julius 4960d 19h /openrisc
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 4963d 15h /openrisc
427 Fixes for C++ to correspond to fixes in uClibc. jeremybennett 4964d 23h /openrisc
426 ORPSoC update

Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.

ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued...
julius 4966d 09h /openrisc
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.
julius 4966d 11h /openrisc
424 C++ library, needed for C++ compiler. jeremybennett 4966d 21h /openrisc
423 Minor typo fixed. jeremybennett 4967d 00h /openrisc
422 Separates out --force actions, so only build dirs corresponding to targets being built are blown away. jeremybennett 4967d 00h /openrisc
421 Fixing some typos in bld-all.sh's --help printout and changed all
"cd .." lines to "cd -".
julius 4969d 21h /openrisc
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 4971d 20h /openrisc
419 ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories.
julius 4971d 22h /openrisc
418 Or1ksim - adding new option when configuring memories, "exitnops" julius 4971d 22h /openrisc
417 ORPSoC re-adding doc automake files, this time not symlinks julius 4974d 19h /openrisc
416 ORPSoC doc cleanup - removing symlinks from automake'd docs build path julius 4974d 19h /openrisc

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.