OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] - Rev 815

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
815 OR1200 debug unit: prevent deadlock when trap instruction stalls

As per mailing list post <20120925160925.5725e06f@latmask.vernier.se>,
the debug unit could deadlock with the instruction decoder if the trap
instruction is held back by a pipeline stall. This change prevents that.

The problem can be reproduced by placing a breakpoint at an unfavorable
position with instruction cache enabled. In our test, this occurred
with or1200-cbasic when placing a breakpoint at test_bss using gdb, but
this is dependent on such factors as cache parameters and compilation
result.
yannv 4282d 13h /openrisc
814 orpsoc/or1200: Set correct PC after reset when parameter boot_adr is used

Signed-off-by: Olof Kindgren <olof@opencores.org>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>
olof 4297d 06h /openrisc
813 or1200: Set correct PC after reset when parameter boot_adr is used

Signed-off-by: Olof Kindgren <olof@opencores.org>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>
olof 4297d 06h /openrisc
812 Fix for Bug 86 - Problem with or1k_interrupt_handler_add() stekern 4361d 14h /openrisc
811 added exec command to redboot skrzyp 4400d 12h /openrisc
810 Added SPI driver skrzyp 4402d 11h /openrisc
809 OR1200: Regenerate documentation.

Forgot newline in version history table, so last entry was missing.
julius 4413d 00h /openrisc
808 OR1200: Add DSX bit support to SR.

Updated documentation, revision is now 13.

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=85
julius 4413d 00h /openrisc
807 ORPSoC: Commit for bug 85 - add DSX support to OR1200.

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=85

Also added software tests, and added these tests to default regression test list
julius 4413d 00h /openrisc
806 OR1200: Fix for bug 90

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=90
julius 4413d 00h /openrisc
805 ORPSoC: Fix for bug 90 - EPCR on range exception bug

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=90
julius 4413d 00h /openrisc
804 OR1200: Fix for bug 91

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=91
julius 4413d 00h /openrisc
803 ORPSoC: Fix for bug 91, l.sub not setting overflow flag correctly

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=91
julius 4413d 00h /openrisc
802 OR1200: Fix for bug 88

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=88
julius 4418d 05h /openrisc
801 ORPSoC: Fix bug 88

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=88
julius 4418d 05h /openrisc
800 FreeRTOSV6.1.1
add or32_dma demo task for test dcache manuplation function
add simple driver of wb_dma
filepang 4430d 20h /openrisc
799 FreeRTOSV6.1.1
add cache related function from u-boot from OpenRISC
enable I/D cache if present
filepang 4431d 21h /openrisc
798 Added drivers for ethmac and sdcard_mass_storage_controller skrzyp 4434d 06h /openrisc
797 testsuite: kill test processes that timeout pgavin 4442d 11h /openrisc
796 Correct orpmon show_rx_buffs and show_mac_regs to use TX_BD_NUM properly. yannv 4445d 14h /openrisc

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.