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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] - Rev 381

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Rev Log message Author Age Path
381 Crossbuild script for 1.0 updated to use new GCC rc2 patch and linux-2.6.35 julius 5049d 01h /openrisc
380 Adding new Linux-2.6.35 patch, to be built with new 1.0 toolchain julius 5049d 01h /openrisc
379 Linux-2.6.34 patch update - ethernet stability fix and USB host (ohs900) startup device detect improvement julius 5049d 02h /openrisc
378 Adding gcc-4.5.1 patches to enable kernel to build again julius 5049d 06h /openrisc
377 gcc-4.5.1/gcc/config/or32/or32.c:
Swap INTVAL for REGNO in or32_legitimate_address_p fixing 64-bit
machine build errors.
julius 5049d 21h /openrisc
376 Adding handling cases for RSP queries seen from new gdb-7.2 in RSP servers in
or1ksim and or_debug_proxy.

Adding ChangeLog to or_debug_proxy
julius 5054d 08h /openrisc
375 ORPmon update for compatibility with OR toolchain 1.0rc1 julius 5055d 02h /openrisc
374 ORPSoCv2 adding some files forgotten from last checkin julius 5055d 02h /openrisc
373 ORPSoCv2 software update for compatibility with OR toolchain 1.0 julius 5055d 02h /openrisc
372 Toolchain install script uClibc variable update julius 5055d 05h /openrisc
371 Toolchain install script binutils commented out fix julius 5055d 05h /openrisc
370 Toolchain install script uclibc url fix julius 5055d 05h /openrisc
369 Toolchain build script binutils path fix julius 5055d 06h /openrisc
368 Toolchain script: adding sim url path julius 5055d 06h /openrisc
367 Fixup 1.0 release script julius 5055d 06h /openrisc
366 Version 1.0 toolchain script commit julius 5055d 06h /openrisc
365 Linux-2.6.34 patch update with updated USB ohs900 host julius 5058d 00h /openrisc
364 OR1200 passes verilator lint. Mainly fixes to widths, and all case statements
altered to casez and Xs changed to ?s.

OR1200 PIC default width back to 31 (was accidentally changed to ORPSoC's 20
last checkin)

OR1200 spec updated to version 0.9, various updates.

OR1200 in ORPSoC and main OR1200 in sync, only difference is defines.
julius 5066d 23h /openrisc
363 ORPSoC's RTL code fixed to pass linting by Verilator.

ORPSoC's debug interface disabled for now in both RTL and System C top level.

Profiled building of cycle-accurate model now done correctly.
julius 5067d 09h /openrisc
362 ORPSoCv2 verilator building working again. Board build fixes to follow julius 5068d 19h /openrisc

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