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[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.1rc1/] [testsuite/] [or1ksim.tests/] - Rev 234

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234 Minor tidy ups. DOS end of line chars fixed. jeremybennett 5094d 11h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
233 New softfloat FPU and testfloat sw for or1ksim julius 5094d 21h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
230 Changed library interface. Fixed namespace problems with instruction lookup in library.

* configure: Regenerated.
* configure.ac: Version changed to current date.
* cpu/or1k/opcode/or32.h <or1ksim_build_automata>: Renamed from
build_automata.
<l_none, num_opcodes, insn_index>: Deleted.
<or1ksim_op_start>: Renamed from op_start.
<or1ksim_automata>: Renamed from automata.
<or1ksim_ti>: Renamed from ti.
<or1ksim_or32_opcodes>: Renamed from or32_opcodes.
<or1ksim_disassembled>: Renamed from disassembled.
<or1ksim_insn_len>: Renamed from insn_len.
<or1ksim_insn_name>: Renamed from insn_name.
<or1ksim_destruct_automata>: Renamed from destruct_automata.
<or1ksim_insn_decode>: Renamed from insn_decode.
<or1ksim_disassemble_insn>: Renamed from disassemble_insn.
<or1ksim_disassemble_index>: Renamed from disassemble_index.
<or1ksim_extend_imm>: Renamed from extend_imm.
<or1ksim_or32_extract>: Renamed from or32_extract
* cpu/or32/or32.c, cpu/or32/execute.c, cpu/or32/generate.c,
* cpu/common/stats.c, cpu/common/abstract.c, cpu/common/parse.c,
* cpu/or1k/opcode/or32.h, cuc/load.c, cuc/cuc.c,
* support/dumpverilog.c, toplevel-support.c: Renaming
corresponding to changes in cpu/or1k/opcode/or32.h.
* cpu/or32/execute-fp.h: Deleted
* cpu/or32/generate.c <include_strings>: Remove reference to
execute-fp.h
* cpu/or32/execute.c <host_fp_rm>: Declared static.
(fp_set_flags_restore_host_rm, fp_set_or1k_rm): Declared static,
forward declaration removed.
* or1ksim.h (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
* libtoplevel.c (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
jeremybennett 5096d 02h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5098d 03h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5105d 02h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5143d 02h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5143d 06h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
122 Added l.ror and l.rori with associated tests. jeremybennett 5144d 02h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5144d 03h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5145d 00h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5147d 03h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5148d 03h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5148d 04h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5149d 02h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5152d 03h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
106 Removing old tests, pending addition of new ones. jeremybennett 5152d 03h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
104 Candidate release 0.4.0rc4 jeremybennett 5155d 10h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5164d 04h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5170d 06h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5184d 12h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/testsuite/or1ksim.tests

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