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[/] [openrisc/] [trunk/] [orpsocv2/] - Rev 436

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435 ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality.
julius 4977d 14h /openrisc/trunk/orpsocv2
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.
julius 4983d 22h /openrisc/trunk/orpsocv2
426 ORPSoC update

Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.

ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued...
julius 4990d 13h /openrisc/trunk/orpsocv2
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.
julius 4990d 14h /openrisc/trunk/orpsocv2
417 ORPSoC re-adding doc automake files, this time not symlinks julius 4998d 23h /openrisc/trunk/orpsocv2
416 ORPSoC doc cleanup - removing symlinks from automake'd docs build path julius 4998d 23h /openrisc/trunk/orpsocv2
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.
julius 4998d 23h /openrisc/trunk/orpsocv2
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 5002d 13h /openrisc/trunk/orpsocv2
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.
julius 5003d 01h /openrisc/trunk/orpsocv2
410 ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again.
julius 5004d 01h /openrisc/trunk/orpsocv2
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.
julius 5004d 01h /openrisc/trunk/orpsocv2
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5004d 13h /openrisc/trunk/orpsocv2
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 5005d 19h /openrisc/trunk/orpsocv2
398 ORPSoCv2 removing generic backend path - not needed julius 5007d 02h /openrisc/trunk/orpsocv2
397 ORPSoCv2:

doc/ path added, with Texinfo documentation. Still a work in progress.

VPI files updated.

OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.

Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build.
julius 5008d 00h /openrisc/trunk/orpsocv2
396 ORPSoCv2 final software fixes...for now. See updated README julius 5010d 23h /openrisc/trunk/orpsocv2
395 ORPSoCv2 moving ethernet tests to correct place julius 5011d 00h /openrisc/trunk/orpsocv2
394 ORPSoCv2 removing unused directories julius 5011d 00h /openrisc/trunk/orpsocv2
393 ORPSoCv2 software rearrangement in progress. Basic tests should now run again. julius 5011d 00h /openrisc/trunk/orpsocv2
392 ORPSoCv2 software path reorganisation stage 1. julius 5011d 16h /openrisc/trunk/orpsocv2

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