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Rev Log message Author Age Path
568 OPRSoC - adding Xilinx Xtreme DSP Spartan-3A 1800A board port and documentation julius 4746d 12h /openrisc/trunk/orpsocv2/boards
563 Search for external cores in <board>/modules path olof 4759d 01h /openrisc/trunk/orpsocv2/boards
560 ORPSoC update - update make scripts, XILINX_PATH setup changes.

Note - may require a change to XILINX_PATH on user systems.
julius 4767d 00h /openrisc/trunk/orpsocv2/boards
544 ORPSoC ordb1a3pe1500 update - adding SD card controller. julius 4784d 13h /openrisc/trunk/orpsocv2/boards
542 ORPSoC scripts cleanup. Now centralised.

Documentation updated for ml501's SPI programming, noting issues with ISE12.
julius 4790d 03h /openrisc/trunk/orpsocv2/boards
530 ORPSoC update

Ethernet MAC Wishbone interface fixes

Beginnings of software update.

ML501 backend script fixes for new ISE
julius 4813d 13h /openrisc/trunk/orpsocv2/boards
503 ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. julius 4856d 23h /openrisc/trunk/orpsocv2/boards
502 ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default
julius 4859d 03h /openrisc/trunk/orpsocv2/boards
500 ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc

ML501 simulation makefile update to allow custom ELFs to be specified
julius 4860d 07h /openrisc/trunk/orpsocv2/boards
499 ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup julius 4861d 00h /openrisc/trunk/orpsocv2/boards
496 ORPSoC ml501 updates - increased frequency, updated documentation julius 4863d 10h /openrisc/trunk/orpsocv2/boards
492 ORPSoC VPI interface for modelsim and documentation update julius 4877d 10h /openrisc/trunk/orpsocv2/boards
486 ORPSoC updates, mainly software, i2c driver julius 4890d 08h /openrisc/trunk/orpsocv2/boards
485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 4894d 13h /openrisc/trunk/orpsocv2/boards
480 ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. julius 4911d 17h /openrisc/trunk/orpsocv2/boards
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 4912d 17h /openrisc/trunk/orpsocv2/boards
478 ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. julius 4914d 08h /openrisc/trunk/orpsocv2/boards
475 ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. julius 4915d 12h /openrisc/trunk/orpsocv2/boards
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI
julius 4920d 13h /openrisc/trunk/orpsocv2/boards
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.
julius 4947d 03h /openrisc/trunk/orpsocv2/boards

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