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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] - Rev 483

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483 ORPSoC OR1200 update. Adding parity testbench and generic fault tolerance testing build. julius 4920d 03h /openrisc/trunk/orpsocv2/boards
482 ORPSoC updates - adding parity checking RTL, ethernet MAC FIFO buffer updates. Software changes. julius 4924d 20h /openrisc/trunk/orpsocv2/boards
480 ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. julius 4925d 22h /openrisc/trunk/orpsocv2/boards
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 4926d 21h /openrisc/trunk/orpsocv2/boards
478 ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. julius 4928d 13h /openrisc/trunk/orpsocv2/boards
475 ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. julius 4929d 17h /openrisc/trunk/orpsocv2/boards
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI
julius 4934d 18h /openrisc/trunk/orpsocv2/boards
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.
julius 4961d 08h /openrisc/trunk/orpsocv2/boards
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.
julius 4968d 12h /openrisc/trunk/orpsocv2/boards
435 ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality.
julius 4975d 03h /openrisc/trunk/orpsocv2/boards
426 ORPSoC update

Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.

ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued...
julius 4988d 02h /openrisc/trunk/orpsocv2/boards
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.
julius 4988d 03h /openrisc/trunk/orpsocv2/boards
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.
julius 4996d 12h /openrisc/trunk/orpsocv2/boards
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 5000d 02h /openrisc/trunk/orpsocv2/boards
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.
julius 5000d 14h /openrisc/trunk/orpsocv2/boards
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.
julius 5001d 14h /openrisc/trunk/orpsocv2/boards
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5002d 02h /openrisc/trunk/orpsocv2/boards
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5055d 09h /openrisc/trunk/orpsocv2/boards
71 ORPSoC board builds, adding readmes julius 5254d 18h /openrisc/trunk/orpsocv2/boards
69 ORPSoC xilinx ml501 board update - added ethernet eupport and software test julius 5259d 00h /openrisc/trunk/orpsocv2/boards

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