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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] - Rev 629

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619 ORPSoC OR1200 fix and regression test for bug 51.

signed-off Julius Baxter
reviewed by Stefan Kristiansson
julius 4711d 14h /openrisc/trunk/orpsocv2/sw/tests
567 ORPSoC ethmac test and diagnosis software program updates. julius 4743d 04h /openrisc/trunk/orpsocv2/sw/tests
535 ORPSoC - adding sw tests for l.rfe julius 4802d 17h /openrisc/trunk/orpsocv2/sw/tests
530 ORPSoC update

Ethernet MAC Wishbone interface fixes

Beginnings of software update.

ML501 backend script fixes for new ISE
julius 4810d 01h /openrisc/trunk/orpsocv2/sw/tests
506 ORPSoC or1200 interrupt and syscall generation test julius 4835d 20h /openrisc/trunk/orpsocv2/sw/tests
504 ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup julius 4852d 16h /openrisc/trunk/orpsocv2/sw/tests
502 ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default
julius 4855d 16h /openrisc/trunk/orpsocv2/sw/tests
499 ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup julius 4857d 13h /openrisc/trunk/orpsocv2/sw/tests
496 ORPSoC ml501 updates - increased frequency, updated documentation julius 4859d 23h /openrisc/trunk/orpsocv2/sw/tests
489 ORPSoC sw cleanup. Remove warnings. julius 4883d 22h /openrisc/trunk/orpsocv2/sw/tests
488 ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. julius 4883d 23h /openrisc/trunk/orpsocv2/sw/tests
485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 4891d 01h /openrisc/trunk/orpsocv2/sw/tests
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 4909d 05h /openrisc/trunk/orpsocv2/sw/tests
477 ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each.
julius 4911d 05h /openrisc/trunk/orpsocv2/sw/tests
475 ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. julius 4912d 01h /openrisc/trunk/orpsocv2/sw/tests
466 ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README
julius 4918d 05h /openrisc/trunk/orpsocv2/sw/tests
462 ORPSoC SystemC wrapper updates, monitor output more similar to or1ksim.

RAM models updated.
julius 4919d 04h /openrisc/trunk/orpsocv2/sw/tests
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.
julius 4950d 20h /openrisc/trunk/orpsocv2/sw/tests
435 ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality.
julius 4957d 11h /openrisc/trunk/orpsocv2/sw/tests
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.
julius 4963d 18h /openrisc/trunk/orpsocv2/sw/tests

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