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[/] [or1k/] [tags/] [nog_patch_38/] - Rev 994

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Rev	Log message	Author	Age	Path
994	Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board.	lampret	8028d 00h	/or1k/tags/nog_patch_38
993	Fixed IMMU bug.	lampret	8028d 00h	/or1k/tags/nog_patch_38
992	A bug when cache enabled and bus error comes fixed.	simons	8028d 09h	/or1k/tags/nog_patch_38
991	Different memory controller.	simons	8028d 09h	/or1k/tags/nog_patch_38
990	Test is now complete.	simons	8028d 10h	/or1k/tags/nog_patch_38
989	c++ is making problems so, for now, it is excluded.	simons	8029d 17h	/or1k/tags/nog_patch_38
988	ORP architecture supported.	simons	8030d 09h	/or1k/tags/nog_patch_38
987	ORP architecture supported.	simons	8030d 16h	/or1k/tags/nog_patch_38
986	outputs out of function are not registered anymore	markom	8030d 17h	/or1k/tags/nog_patch_38
985	DTLB translation doesn't work on or1ksim when IC/DC enabled.	lampret	8031d 04h	/or1k/tags/nog_patch_38
984	Disable SB until it is tested	lampret	8031d 05h	/or1k/tags/nog_patch_38
983	First checkin	lampret	8031d 07h	/or1k/tags/nog_patch_38
982	Moved to sim/bin	lampret	8031d 07h	/or1k/tags/nog_patch_38
981	First checkin.	lampret	8031d 07h	/or1k/tags/nog_patch_38
980	Removed sim.tcl that shouldn't be here.	lampret	8031d 07h	/or1k/tags/nog_patch_38
979	Removed old test case binaries.	lampret	8031d 07h	/or1k/tags/nog_patch_38
978	Added variable delay for SRAM.	lampret	8031d 07h	/or1k/tags/nog_patch_38
977	Added store buffer.	lampret	8031d 07h	/or1k/tags/nog_patch_38
976	Added store buffer	lampret	8031d 07h	/or1k/tags/nog_patch_38
975	First checkin	lampret	8031d 07h	/or1k/tags/nog_patch_38

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[/] [or1k/] [tags/] [nog_patch_38/] - Rev 994

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