OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_52/] - Rev 1006

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1006 Import ivang 8023d 12h /or1k/tags/nog_patch_52
1005 Import ivang 8023d 12h /or1k/tags/nog_patch_52
1004 Now every ramdisk image should have init program. simons 8023d 20h /or1k/tags/nog_patch_52
1003 cuc temporary files are deleted upon exiting markom 8023d 21h /or1k/tags/nog_patch_52
1002 Now every ramdisk image should have init program. simons 8023d 21h /or1k/tags/nog_patch_52
1001 fixed load/store state machine verilog generation errors markom 8023d 21h /or1k/tags/nog_patch_52
1000 IC/DC cache enable routines fixed. simons 8023d 21h /or1k/tags/nog_patch_52
999 Now every ramdisk image should have init program. simons 8023d 22h /or1k/tags/nog_patch_52
998 added missing fout initialization markom 8024d 00h /or1k/tags/nog_patch_52
997 PRINTF should be used instead of printf; command redirection repaired markom 8024d 01h /or1k/tags/nog_patch_52
996 some minor bugs fixed markom 8024d 23h /or1k/tags/nog_patch_52
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 8025d 07h /or1k/tags/nog_patch_52
993 Fixed IMMU bug. lampret 8025d 07h /or1k/tags/nog_patch_52
992 A bug when cache enabled and bus error comes fixed. simons 8025d 16h /or1k/tags/nog_patch_52
991 Different memory controller. simons 8025d 16h /or1k/tags/nog_patch_52
990 Test is now complete. simons 8025d 16h /or1k/tags/nog_patch_52
989 c++ is making problems so, for now, it is excluded. simons 8027d 00h /or1k/tags/nog_patch_52
988 ORP architecture supported. simons 8027d 16h /or1k/tags/nog_patch_52
987 ORP architecture supported. simons 8027d 23h /or1k/tags/nog_patch_52
986 outputs out of function are not registered anymore markom 8028d 00h /or1k/tags/nog_patch_52

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.