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[/] [or1k/] [tags/] [nog_patch_58/] - Rev 797

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Rev Log message Author Age Path
797 Changed hardcoded address for fake MC to use a define. lampret 8143d 00h /or1k/tags/nog_patch_58
796 Removed unused ports wb_clki and wb_rst_i lampret 8143d 00h /or1k/tags/nog_patch_58
795 Added a directive to ignore signed division variables that are only used in simulation. lampret 8143d 04h /or1k/tags/nog_patch_58
794 Added again just recently removed full_case directive lampret 8143d 04h /or1k/tags/nog_patch_58
793 Added synthesis off/on for timescale.v included file. lampret 8143d 04h /or1k/tags/nog_patch_58
792 Fixed port names that changed. lampret 8143d 04h /or1k/tags/nog_patch_58
791 Fixed some ports in instnatiations that were removed from the modules lampret 8143d 04h /or1k/tags/nog_patch_58
790 Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives lampret 8143d 04h /or1k/tags/nog_patch_58
789 Added response from memory controller (addr 0x60000000) lampret 8143d 05h /or1k/tags/nog_patch_58
788 Some of the warnings fixed. lampret 8143d 06h /or1k/tags/nog_patch_58
787 Added romfs.tgz lampret 8144d 00h /or1k/tags/nog_patch_58
786 Moved UCF constraint file to the backend directory. lampret 8144d 00h /or1k/tags/nog_patch_58
785 Added XSV specific documentation. lampret 8144d 00h /or1k/tags/nog_patch_58
784 Added soem missing files. lampret 8144d 00h /or1k/tags/nog_patch_58
783 Added sim directory and sub files/dirs. lampret 8144d 00h /or1k/tags/nog_patch_58
782 Added the old SW directory. It needs to be updated for the new ORP environment and test cases moved to sw directory. lampret 8144d 00h /or1k/tags/nog_patch_58
781 Added design compiler scripts. However these are not ready for use yet .... They need to be updated for the ORP sources and ORP sources need to be updated as well. lampret 8144d 01h /or1k/tags/nog_patch_58
780 Added libraries. lampret 8144d 01h /or1k/tags/nog_patch_58
779 Added bench directory lampret 8144d 01h /or1k/tags/nog_patch_58
778 Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs. lampret 8144d 01h /or1k/tags/nog_patch_58

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