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[/] [or1k/] [tags/] [nog_patch_59/] - Rev 997

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Rev Log message Author Age Path
997 PRINTF should be used instead of printf; command redirection repaired markom 7995d 08h /or1k/tags/nog_patch_59
996 some minor bugs fixed markom 7996d 06h /or1k/tags/nog_patch_59
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7996d 14h /or1k/tags/nog_patch_59
993 Fixed IMMU bug. lampret 7996d 14h /or1k/tags/nog_patch_59
992 A bug when cache enabled and bus error comes fixed. simons 7996d 23h /or1k/tags/nog_patch_59
991 Different memory controller. simons 7996d 23h /or1k/tags/nog_patch_59
990 Test is now complete. simons 7996d 23h /or1k/tags/nog_patch_59
989 c++ is making problems so, for now, it is excluded. simons 7998d 07h /or1k/tags/nog_patch_59
988 ORP architecture supported. simons 7998d 23h /or1k/tags/nog_patch_59
987 ORP architecture supported. simons 7999d 06h /or1k/tags/nog_patch_59
986 outputs out of function are not registered anymore markom 7999d 06h /or1k/tags/nog_patch_59
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 7999d 18h /or1k/tags/nog_patch_59
984 Disable SB until it is tested lampret 7999d 18h /or1k/tags/nog_patch_59
983 First checkin lampret 7999d 20h /or1k/tags/nog_patch_59
982 Moved to sim/bin lampret 7999d 20h /or1k/tags/nog_patch_59
981 First checkin. lampret 7999d 20h /or1k/tags/nog_patch_59
980 Removed sim.tcl that shouldn't be here. lampret 7999d 20h /or1k/tags/nog_patch_59
979 Removed old test case binaries. lampret 7999d 20h /or1k/tags/nog_patch_59
978 Added variable delay for SRAM. lampret 7999d 20h /or1k/tags/nog_patch_59
977 Added store buffer. lampret 7999d 20h /or1k/tags/nog_patch_59

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