URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_10/] - Rev 1780

Rev	Log message	Author	Age	Path
1765		root	5577d 05h	/or1k/tags/rel_10
1180	This commit was manufactured by cvs2svn to create tag 'rel_10'.		7615d 14h	/tags/rel_10
1179	BIST interface added for Artisan memory instances.	simons	7615d 14h	/trunk
1178	avoid another immu exception that should not happen	phoenix	7645d 02h	/trunk
1177	more informative output	phoenix	7646d 08h	/trunk
1176	Added comments.	damonb	7647d 00h	/trunk
1174	fix for immu exceptions that never should have happened	phoenix	7648d 04h	/trunk
1170	Added support for l.addc instruction.	csanchez	7656d 08h	/trunk
1169	Added support for l.addc instruction.	csanchez	7656d 08h	/trunk
1168	Added explicit alignment expressions.	csanchez	7661d 18h	/trunk
1167	Corrected offset of TSS field within task_struct.	csanchez	7661d 18h	/trunk
1166	Fixed problem with relocations of non-allocated sections.	csanchez	7661d 18h	/trunk
1165	timeout bug fixed; contribution by Carlos	markom	7678d 12h	/trunk
1161	When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed.	lampret	7682d 01h	/trunk
1160	added missing .rodata.* section into rom linker script	phoenix	7713d 01h	/trunk
1159	No functional changes. Added defines to disable implementation of multiplier/MAC	lampret	7725d 04h	/trunk
1158	Added simple uart test case.	lampret	7726d 05h	/trunk
1157	Added syscall test case.	lampret	7726d 05h	/trunk
1156	Tick timer test case added.	lampret	7727d 02h	/trunk
1155	No functional change. Only added customization for exception vectors.	lampret	7728d 05h	/trunk