OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_21/] - Rev 369

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
369 Configuration command description added. simons 8269d 12h /or1k/tags/rel_21
368 Typos. lampret 8269d 12h /or1k/tags/rel_21
367 Changed DSR/DRR behavior and exception detection. lampret 8269d 12h /or1k/tags/rel_21
366 *** empty log message *** simons 8270d 01h /or1k/tags/rel_21
365 Added wb_cyc_o assignment after it was removed by accident. lampret 8270d 07h /or1k/tags/rel_21
364 info spr bug fixed markom 8271d 06h /or1k/tags/rel_21
363 program can be stepped and continued before running it, supporting low level debugging markom 8271d 06h /or1k/tags/rel_21
362 some changes based on current modifications to or1k; cleaner register naming; ctrl-c causes stepi; write&read pc work on next instruction markom 8271d 12h /or1k/tags/rel_21
361 set config command added; config struct has been divided into two structs - config and runtime; -f option allows multiple config scripts markom 8271d 12h /or1k/tags/rel_21
360 Added OR1200_REGISTERED_INPUTS. lampret 8271d 23h /or1k/tags/rel_21
359 Added optional sampling of inputs. lampret 8271d 23h /or1k/tags/rel_21
358 Fixed virtual silicon single-port rams instantiation. lampret 8271d 23h /or1k/tags/rel_21
357 Fixed dbg_is_o assignment width. lampret 8271d 23h /or1k/tags/rel_21
356 Break point bug fixed simons 8272d 02h /or1k/tags/rel_21
355 uart VAPI model improved; changes to MC and eth. markom 8272d 09h /or1k/tags/rel_21
354 Fixed width of du_except. lampret 8272d 19h /or1k/tags/rel_21
353 Cashes disabled. simons 8273d 06h /or1k/tags/rel_21
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8274d 09h /or1k/tags/rel_21
351 Fixed some l.trap typos. lampret 8274d 10h /or1k/tags/rel_21
350 For GDB changed single stepping and disabled trap exception. lampret 8274d 12h /or1k/tags/rel_21

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.