URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_4/] - Rev 987

Rev	Log message	Author	Age	Path
987	ORP architecture supported.	simons	7994d 03h	/or1k/tags/rel_4
986	outputs out of function are not registered anymore	markom	7994d 04h	/or1k/tags/rel_4
985	DTLB translation doesn't work on or1ksim when IC/DC enabled.	lampret	7994d 16h	/or1k/tags/rel_4
984	Disable SB until it is tested	lampret	7994d 16h	/or1k/tags/rel_4
983	First checkin	lampret	7994d 18h	/or1k/tags/rel_4
982	Moved to sim/bin	lampret	7994d 18h	/or1k/tags/rel_4
981	First checkin.	lampret	7994d 18h	/or1k/tags/rel_4
980	Removed sim.tcl that shouldn't be here.	lampret	7994d 18h	/or1k/tags/rel_4
979	Removed old test case binaries.	lampret	7994d 18h	/or1k/tags/rel_4
978	Added variable delay for SRAM.	lampret	7994d 18h	/or1k/tags/rel_4
977	Added store buffer.	lampret	7994d 18h	/or1k/tags/rel_4
976	Added store buffer	lampret	7994d 18h	/or1k/tags/rel_4
975	First checkin	lampret	7994d 18h	/or1k/tags/rel_4
974	Enabled what works on or1ksim and disabled other tests.	lampret	7994d 20h	/or1k/tags/rel_4
973	generated cuc top scheduler builds without syntax errors; not tested yet	markom	7997d 00h	/or1k/tags/rel_4
972	Interrupt suorces fixed.	simons	7997d 00h	/or1k/tags/rel_4
971	Now even keyboard test passes.	simons	7997d 03h	/or1k/tags/rel_4
970	Testbench is now running on ORP architecture platform.	simons	7997d 16h	/or1k/tags/rel_4
969	Checking in except directory.	lampret	7998d 08h	/or1k/tags/rel_4
968	Checking in utils directory.	lampret	7998d 08h	/or1k/tags/rel_4