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[/] [or1k/] [tags/] [stable/] [or1200/] [rtl/] [verilog/] - Rev 352

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Rev Log message Author Age Path
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8298d 11h /or1k/tags/stable/or1200/rtl/verilog
351 Fixed some l.trap typos. lampret 8298d 13h /or1k/tags/stable/or1200/rtl/verilog
350 For GDB changed single stepping and disabled trap exception. lampret 8298d 14h /or1k/tags/stable/or1200/rtl/verilog
338 Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc) lampret 8303d 13h /or1k/tags/stable/or1200/rtl/verilog
337 Fixed tick timer interrupt reporting by using TTCR[IP] bit. lampret 8303d 13h /or1k/tags/stable/or1200/rtl/verilog
328 Moved flag bit into SR. Changed RF enable from constant enable to dynamic enable for read ports. lampret 8304d 21h /or1k/tags/stable/or1200/rtl/verilog
316 Fixed exceptions. lampret 8306d 19h /or1k/tags/stable/or1200/rtl/verilog
271 Added missing endif lampret 8311d 08h /or1k/tags/stable/or1200/rtl/verilog
265 Modified virtual silicon instantiations. lampret 8314d 04h /or1k/tags/stable/or1200/rtl/verilog
220 Fixed parameters in generic sprams. lampret 8325d 03h /or1k/tags/stable/or1200/rtl/verilog
219 Fixed sensitivity list. lampret 8326d 04h /or1k/tags/stable/or1200/rtl/verilog
218 Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF. lampret 8326d 05h /or1k/tags/stable/or1200/rtl/verilog
217 Fixed some synthesis warnings. Configured with caches and MMUs. lampret 8327d 23h /or1k/tags/stable/or1200/rtl/verilog
216 No longer needed. lampret 8333d 09h /or1k/tags/stable/or1200/rtl/verilog
215 MP3 version. lampret 8333d 09h /or1k/tags/stable/or1200/rtl/verilog
210 Updated debug. More cleanup. Added MAC. lampret 8346d 18h /or1k/tags/stable/or1200/rtl/verilog
209 Update debug. lampret 8348d 23h /or1k/tags/stable/or1200/rtl/verilog
205 Adding debug capabilities. Half done. lampret 8354d 18h /or1k/tags/stable/or1200/rtl/verilog
203 Updated from xess branch. lampret 8358d 23h /or1k/tags/stable/or1200/rtl/verilog
176 IC enable/disable. lampret 8391d 15h /or1k/tags/stable/or1200/rtl/verilog

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