OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_1_0/] [or1ksim/] [cpu/] - Rev 1765

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5637d 09h /or1k/tags/stable_0_1_0/or1ksim/cpu
1357 This commit was manufactured by cvs2svn to create tag 'stable_0_1_0'. 7125d 21h /or1k/tags/stable_0_1_0/or1ksim/cpu
1356 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. 7125d 21h /or1k/tags/stable_0_1_0/or1ksim/cpu
1354 typing fixes phoenix 7126d 17h /or1k/tags/stable_0_1_0/or1ksim/cpu
1353 Modularise simulator command parsing nogj 7127d 13h /or1k/tags/stable_0_1_0/or1ksim/cpu
1352 Optimise execution history tracking nogj 7127d 14h /or1k/tags/stable_0_1_0/or1ksim/cpu
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7127d 14h /or1k/tags/stable_0_1_0/or1ksim/cpu
1346 Remove the global op structure nogj 7140d 17h /or1k/tags/stable_0_1_0/or1ksim/cpu
1345 Fix out-of-tree builds nogj 7140d 18h /or1k/tags/stable_0_1_0/or1ksim/cpu
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7140d 18h /or1k/tags/stable_0_1_0/or1ksim/cpu
1343 * Fix warnings in insnset.c and execute.c nogj 7140d 18h /or1k/tags/stable_0_1_0/or1ksim/cpu
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7140d 18h /or1k/tags/stable_0_1_0/or1ksim/cpu
1341 Mark wich operand is the destination operand in the architechture definition nogj 7140d 18h /or1k/tags/stable_0_1_0/or1ksim/cpu
1338 l.ff1 instruction added andreje 7156d 16h /or1k/tags/stable_0_1_0/or1ksim/cpu
1324 memory access functions fixes phoenix 7238d 09h /or1k/tags/stable_0_1_0/or1ksim/cpu
1323 Adrian Wise: or1ksim bugfix & Solaris build phoenix 7239d 16h /or1k/tags/stable_0_1_0/or1ksim/cpu
1321 some tests rely on exit(0) as a last std output text to pass phoenix 7242d 09h /or1k/tags/stable_0_1_0/or1ksim/cpu
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7244d 09h /or1k/tags/stable_0_1_0/or1ksim/cpu
1316 added a warning phoenix 7262d 06h /or1k/tags/stable_0_1_0/or1ksim/cpu
1314 in some cases (cbasic test from orp for example) this caused problems, disable for now phoenix 7262d 07h /or1k/tags/stable_0_1_0/or1ksim/cpu

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.