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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] - Rev 997

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Rev Log message Author Age Path
997 PRINTF should be used instead of printf; command redirection repaired markom 8019d 13h /or1k/tags/stable_0_2_0_rc1
996 some minor bugs fixed markom 8020d 12h /or1k/tags/stable_0_2_0_rc1
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 8020d 20h /or1k/tags/stable_0_2_0_rc1
993 Fixed IMMU bug. lampret 8020d 20h /or1k/tags/stable_0_2_0_rc1
992 A bug when cache enabled and bus error comes fixed. simons 8021d 05h /or1k/tags/stable_0_2_0_rc1
991 Different memory controller. simons 8021d 05h /or1k/tags/stable_0_2_0_rc1
990 Test is now complete. simons 8021d 05h /or1k/tags/stable_0_2_0_rc1
989 c++ is making problems so, for now, it is excluded. simons 8022d 13h /or1k/tags/stable_0_2_0_rc1
988 ORP architecture supported. simons 8023d 04h /or1k/tags/stable_0_2_0_rc1
987 ORP architecture supported. simons 8023d 12h /or1k/tags/stable_0_2_0_rc1
986 outputs out of function are not registered anymore markom 8023d 12h /or1k/tags/stable_0_2_0_rc1
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8024d 00h /or1k/tags/stable_0_2_0_rc1
984 Disable SB until it is tested lampret 8024d 00h /or1k/tags/stable_0_2_0_rc1
983 First checkin lampret 8024d 02h /or1k/tags/stable_0_2_0_rc1
982 Moved to sim/bin lampret 8024d 02h /or1k/tags/stable_0_2_0_rc1
981 First checkin. lampret 8024d 02h /or1k/tags/stable_0_2_0_rc1
980 Removed sim.tcl that shouldn't be here. lampret 8024d 02h /or1k/tags/stable_0_2_0_rc1
979 Removed old test case binaries. lampret 8024d 02h /or1k/tags/stable_0_2_0_rc1
978 Added variable delay for SRAM. lampret 8024d 02h /or1k/tags/stable_0_2_0_rc1
977 Added store buffer. lampret 8024d 02h /or1k/tags/stable_0_2_0_rc1

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