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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [gen_or1k_isa/] - Rev 1765

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1765 root 5553d 16h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1572 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc1'. 6827d 23h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1557 Fix most warnings issued by gcc4 nogj 6836d 06h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1554 fixed l.maci encoding phoenix 6853d 17h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 6966d 20h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1452 Implement a dynamic recompiler to speed up the execution nogj 6993d 23h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 6993d 23h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1385 Fix description of the l.mac/l.msb/l.maci instructions nogj 7009d 03h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7009d 03h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7043d 22h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1346 Remove the global op structure nogj 7057d 01h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7057d 02h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1341 Mark wich operand is the destination operand in the architechture definition nogj 7057d 02h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1338 l.ff1 instruction added andreje 7073d 00h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1309 removed includes phoenix 7245d 19h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1308 Gyorgy Jeney: extensive cleanup phoenix 7248d 16h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7270d 16h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1286 Changed desciption of the l.cust5 insns lampret 7319d 19h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1285 Changed desciption of the l.cust5 insns lampret 7319d 19h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa
1169 Added support for l.addc instruction. csanchez 7632d 20h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa

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