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[/] [or1k/] [trunk/] [gen_or1k_isa/] [sources] - Rev 1748

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Rev	Log message	Author	Age	Path
1748	These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes are explained in the NEWS, README and ChangeLog files. A number of long-standing bugs are fixed (see the OpenRISC tracker), and the code is brought up to a consistent standard, following the GNU coding conventions throughout. Argument parsing now uses argtable2, and a User Guide has been added. Documentation throughout has been extended to be compatible with Doxygen, providing a further level of technical detail on the internals.	jeremybennett	5786d 07h	/or1k/trunk/gen_or1k_isa/sources
1672	Store instructions don't modify any register. Don't mark them as such in the arch. definitions	nogj	6783d 05h	/or1k/trunk/gen_or1k_isa/sources
1656	Pass the instruction operands as part of the op_queue structure.	nogj	6783d 05h	/or1k/trunk/gen_or1k_isa/sources
1605	Execute l.ff1 instruction	nogj	6845d 06h	/or1k/trunk/gen_or1k_isa/sources
1601	fixed description of l.sfXXXi	lampret	6847d 09h	/or1k/trunk/gen_or1k_isa/sources
1597	Fix parsing the destination register	nogj	6857d 08h	/or1k/trunk/gen_or1k_isa/sources
1591	Added l.fl1, fixed desc of l.ff1	lampret	6860d 05h	/or1k/trunk/gen_or1k_isa/sources
1590	Added l.fl1	lampret	6860d 05h	/or1k/trunk/gen_or1k_isa/sources
1557	Fix most warnings issued by gcc4	nogj	6919d 16h	/or1k/trunk/gen_or1k_isa/sources
1554	fixed l.maci encoding	phoenix	6937d 02h	/or1k/trunk/gen_or1k_isa/sources
1475	l.rfe does not have a delay slot. Don't mark it as such.	nogj	7050d 05h	/or1k/trunk/gen_or1k_isa/sources
1452	Implement a dynamic recompiler to speed up the execution	nogj	7077d 08h	/or1k/trunk/gen_or1k_isa/sources
1440	Reclasify l.trap and l.sys to be an exception instruction	nogj	7077d 08h	/or1k/trunk/gen_or1k_isa/sources
1385	Fix description of the l.mac/l.msb/l.maci instructions	nogj	7092d 12h	/or1k/trunk/gen_or1k_isa/sources
1384	Fix the parameters to the l.ff1/l.maci instructions	nogj	7092d 12h	/or1k/trunk/gen_or1k_isa/sources
1350	Mark a simulated cpu address as such, by introducing the new oraddr_t type	nogj	7127d 07h	/or1k/trunk/gen_or1k_isa/sources
1346	Remove the global op structure	nogj	7140d 10h	/or1k/trunk/gen_or1k_isa/sources
1342	* Fix generate.c to produce a execgen.c with less warnings. * Fix the --enable-simple configure option.	nogj	7140d 11h	/or1k/trunk/gen_or1k_isa/sources
1341	Mark wich operand is the destination operand in the architechture definition	nogj	7140d 11h	/or1k/trunk/gen_or1k_isa/sources
1338	l.ff1 instruction added	andreje	7156d 09h	/or1k/trunk/gen_or1k_isa/sources

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