OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [or1ksim/] [cpu/] [or32/] - Rev 184

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
184 modified decode for trace debugging chris 8346d 11h /or1k/trunk/or1ksim/cpu/or32
174 Few changes that should be done previously:
- machine.h replaced by spr_defs.h
- if reset label does not exist, boot from 0x0100
markom 8367d 07h /or1k/trunk/or1ksim/cpu/or32
173 - profiler added, use e.g.:
make profiler
./sim -profile -fast executable
./profiler -g [-c]

(no special compiling options necessary)
markom 8369d 11h /or1k/trunk/or1ksim/cpu/or32
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed
markom 8375d 03h /or1k/trunk/or1ksim/cpu/or32
144 Modifications necessary for functional gdb interface chris 8419d 05h /or1k/trunk/or1ksim/cpu/or32
142 Modifications for a functional gdb environment chris 8419d 05h /or1k/trunk/or1ksim/cpu/or32
138 - on the fly insn decoding
- removed asm input file support
- removed string from execution
- speedup of loading
markom 8422d 08h /or1k/trunk/or1ksim/cpu/or32
133 moved header files to match other utilities
repaired l.sra and some other shifting instructions
started build_automata for binary instruction decode
markom 8425d 07h /or1k/trunk/or1ksim/cpu/or32
129 Added code to inject insn from Debug Unit DIR chris 8426d 06h /or1k/trunk/or1ksim/cpu/or32
123 Bugs fixed:
- l.rfe temporarly disables exceptions
- l.sys does PC -= 4
- breakpoints now supported at peripheria locations
- uart0.rt/.tx nonexistent file segment fault

Other modifications:
- replaced string names to instruction indexes
- execute.c executes specified (in ISA table) function
- modified ISA table - flag needed for gdb
- added or32.c, which supports or32.h
- added new instructions l.mac, l.msb, l.maci, l.macrc
and their executing functions (opcodes to be revisited)
- added header acconfig.h
- modified configuration files
markom 8432d 04h /or1k/trunk/or1ksim/cpu/or32
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8457d 12h /or1k/trunk/or1ksim/cpu/or32
98 Return value register is now r9. lampret 8472d 13h /or1k/trunk/or1ksim/cpu/or32
83 Updates. lampret 8504d 04h /or1k/trunk/or1ksim/cpu/or32
77 Regular update. lampret 8657d 10h /or1k/trunk/or1ksim/cpu/or32
68 Added hook for l.sys 204. Changed SPR of flag (no more CCR) lampret 8676d 10h /or1k/trunk/or1ksim/cpu/or32
54 Regular maintenance. lampret 8727d 10h /or1k/trunk/or1ksim/cpu/or32
20 or1k renamed to or32. lampret 8837d 09h /or1k/trunk/or1ksim/cpu/or32
13 Rebuild of the generated files. jrydberg 8898d 01h /or1k/trunk/or1ksim/cpu/or32
7 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.
jrydberg 8898d 02h /or1k/trunk/or1ksim/cpu/or32
6 Just a regular update with exception of cache simulation. MMU simulation still under development. lampret 8898d 20h /or1k/trunk/or1ksim/cpu/or32

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.