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[/] [or1k/] [trunk/] [orp/] [orp_soc/] - Rev 1268

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1268 Merged branch_qmem into main tree. lampret 7396d 17h /or1k/trunk/orp/orp_soc
1197 disabled ram-init of ps2 (old) +
changed MAC type into DOS type, so that Xilinx ISE can work with it		 dries 7602d 14h /or1k/trunk/orp/orp_soc
1195 made the project file a little bit more universal dries 7602d 16h /or1k/trunk/orp/orp_soc
1193 disabled SRAM_GENERIC and added comment +
corrected 'wb_err' into 'wb_err_o'		 dries 7602d 17h /or1k/trunk/orp/orp_soc
1192 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address		 dries 7602d 18h /or1k/trunk/orp/orp_soc
1191 disabled 'bench_defines.v' during synthesis +
added define to specify usage of flash instruction address		 dries 7602d 18h /or1k/trunk/orp/orp_soc
1176 Added comments. damonb 7665d 21h /or1k/trunk/orp/orp_soc
1158 Added simple uart test case. lampret 7745d 03h /or1k/trunk/orp/orp_soc
1157 Added syscall test case. lampret 7745d 03h /or1k/trunk/orp/orp_soc
1156 Tick timer test case added. lampret 7745d 23h /or1k/trunk/orp/orp_soc
1141 WB = 1/2 RISC clock test code enabled. lampret 7760d 04h /or1k/trunk/orp/orp_soc
1138 Added some information how to run simulations. lampret 7761d 00h /or1k/trunk/orp/orp_soc
1137 Added RFRAM generic and Altera lpm library. lampret 7761d 00h /or1k/trunk/orp/orp_soc
1136 Add altera lpm library. lampret 7761d 00h /or1k/trunk/orp/orp_soc
1135 Added get_gpr support for OR1200_RFRAM_GENERIC lampret 7761d 00h /or1k/trunk/orp/orp_soc
1134 Changed location of debug test code to 0. lampret 7761d 00h /or1k/trunk/orp/orp_soc
1133 Adding OR1200_CLMODE_1TO2 test code. lampret 7761d 00h /or1k/trunk/orp/orp_soc
1125 This test case passes. lampret 7782d 06h /or1k/trunk/orp/orp_soc
1105 Added WB b3 signals lampret 7880d 16h /or1k/trunk/orp/orp_soc
1096 An example of SW and RTL regression log because many people asked for. lampret 7892d 02h /or1k/trunk/orp/orp_soc

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