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[/] [or1k/] [trunk] - Rev 803

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Rev Log message Author Age Path
803 Free irq handler fixed. simons 8135d 19h /or1k/trunk
802 Cache and tick timer tests fixed. simons 8137d 06h /or1k/trunk
801 l.muli instruction added markom 8139d 02h /or1k/trunk
800 Bug fixed. simons 8140d 00h /or1k/trunk
799 Wrapping around 512k boundary to simulate real hw. simons 8143d 17h /or1k/trunk
798 Hardware scroll added. This possible due to the fact that crt is wrapping around 512k boundary. simons 8143d 17h /or1k/trunk
797 Changed hardcoded address for fake MC to use a define. lampret 8143d 19h /or1k/trunk
796 Removed unused ports wb_clki and wb_rst_i lampret 8143d 19h /or1k/trunk
795 Added a directive to ignore signed division variables that are only used in simulation. lampret 8143d 23h /or1k/trunk
794 Added again just recently removed full_case directive lampret 8143d 23h /or1k/trunk
793 Added synthesis off/on for timescale.v included file. lampret 8143d 23h /or1k/trunk
792 Fixed port names that changed. lampret 8143d 23h /or1k/trunk
791 Fixed some ports in instnatiations that were removed from the modules lampret 8143d 23h /or1k/trunk
790 Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives lampret 8143d 23h /or1k/trunk
789 Added response from memory controller (addr 0x60000000) lampret 8144d 00h /or1k/trunk
788 Some of the warnings fixed. lampret 8144d 00h /or1k/trunk
787 Added romfs.tgz lampret 8144d 18h /or1k/trunk
786 Moved UCF constraint file to the backend directory. lampret 8144d 19h /or1k/trunk
785 Added XSV specific documentation. lampret 8144d 19h /or1k/trunk
784 Added soem missing files. lampret 8144d 19h /or1k/trunk

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