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[/] [pci/] [tags/] [rel_WB_B3/] [bench/] - Rev 89

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Rev Log message Author Age Path
89 Burst 2 error fixed. mihad 7758d 22h /pci/tags/rel_WB_B3/bench
87 Updated acording to RTL changes. mihad 7776d 18h /pci/tags/rel_WB_B3/bench
81 Updated synchronization in top level fifo modules. mihad 7819d 12h /pci/tags/rel_WB_B3/bench
73 Bug fixes, testcases added. mihad 7828d 18h /pci/tags/rel_WB_B3/bench
69 Changed BIST signal names etc.. mihad 7920d 21h /pci/tags/rel_WB_B3/bench
66 Changed empty status generation in pciw_fifo_control.v mihad 7927d 22h /pci/tags/rel_WB_B3/bench
64 The testcase I just added in previous revision repaired mihad 7930d 22h /pci/tags/rel_WB_B3/bench
63 Added additional testcase and changed rst name in BIST to trst mihad 7931d 00h /pci/tags/rel_WB_B3/bench
62 Added BIST signals for RAMs. mihad 7933d 17h /pci/tags/rel_WB_B3/bench
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7947d 00h /pci/tags/rel_WB_B3/bench
54 Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim mihad 7980d 17h /pci/tags/rel_WB_B3/bench
52 Oops, never before noticed that OC header is missing mihad 7981d 01h /pci/tags/rel_WB_B3/bench
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 7981d 01h /pci/tags/rel_WB_B3/bench
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 7989d 23h /pci/tags/rel_WB_B3/bench
44 Added for testing of Configuration Cycles Type 1 mihad 7989d 23h /pci/tags/rel_WB_B3/bench
43 Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device mihad 7989d 23h /pci/tags/rel_WB_B3/bench
35 Files updated with missing includes, resolved some race conditions in test bench mihad 8135d 02h /pci/tags/rel_WB_B3/bench
34 Added missing include statements mihad 8150d 01h /pci/tags/rel_WB_B3/bench
33 Added some testcases, removed un-needed fifo signals mihad 8150d 22h /pci/tags/rel_WB_B3/bench
26 Modified testbench and fixed some bugs mihad 8164d 17h /pci/tags/rel_WB_B3/bench

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