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[/] [pci/] [tags/] [wb2hpi/] [rtl/] - Rev 154

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Rev	Log message	Author	Age	Path
154	New directory structure.	root	5563d 22h	/pci/tags/wb2hpi/rtl
141	This commit was manufactured by cvs2svn to create tag 'wb2hpi'.		7435d 19h	/pci/tags/wb2hpi/rtl
140	Update! SPOCI Implemented!	mihad	7435d 19h	/pci/tags/wb2hpi/rtl
137	def_wb_imagex_addr_map defined correctly	fr2201	7462d 21h	/pci/tags/wb2hpi/rtl
136	Reset values for PCI, WB defined (PCI_TAx,WB_BAx,WB_TAx,WB_AMx,WB_BAx_MEM_IO)	fr2201	7462d 21h	/pci/tags/wb2hpi/rtl
132	Compact PCI Hot Swap support added. New testcases added. Specification updated. Test application changed to support WB B3 cycles.	mihad	7471d 19h	/pci/tags/wb2hpi/rtl
131	Moved top.v to bench directory. Removed unneeded meta_flop, modified files list files accordingly.	mihad	7475d 18h	/pci/tags/wb2hpi/rtl
130	The wbs B3 to B2 translation logic had wrong reset wire connected!	mihad	7480d 18h	/pci/tags/wb2hpi/rtl
128	Some warning cleanup.	simons	7481d 21h	/pci/tags/wb2hpi/rtl
126	ifdef - endif statements put in separate lines for flint compatibility.	simons	7489d 14h	/pci/tags/wb2hpi/rtl
124	Added missing signals to 2 sensitivity lists. Everything works the same as before.	tadejm	7527d 21h	/pci/tags/wb2hpi/rtl
122	mbist signals updated according to newest convention	markom	7534d 21h	/pci/tags/wb2hpi/rtl
117	WB Master is now WISHBONE B3 compatible.	tadejm	7591d 09h	/pci/tags/wb2hpi/rtl
116	Corrected bug when writing to FIFO (now it is registered).	tadejm	7591d 10h	/pci/tags/wb2hpi/rtl
115	Added signals for WB Master B3.	tadejm	7591d 10h	/pci/tags/wb2hpi/rtl
113	ifdefs moved to thier own lines, this confuses some of the tools.	simons	7598d 12h	/pci/tags/wb2hpi/rtl
111	synchronizer_flop replaced with pci_synchronizer_flop, artisan ram instance updated.	simons	7598d 17h	/pci/tags/wb2hpi/rtl
110	Module that converts slave WISHBONE B3 accesses to WISHBONE B2 accesses with CAB.	mihad	7600d 16h	/pci/tags/wb2hpi/rtl
108	Added 'three_left_out' to pci_pciw_fifo signaling three locations before full. Added comparison between current registered cbe and next unregistered cbe to signal wb_master whether it is allowed to performe burst or not. Due to this, I needed 'three_left_out' so that writing to pci_pciw_fifo can be registered, otherwise timing problems would occure.	tadejm	7604d 14h	/pci/tags/wb2hpi/rtl
106	Added limited WISHBONE B3 support for WISHBONE Slave Unit. Doesn't support full speed bursts yet.	mihad	7609d 12h	/pci/tags/wb2hpi/rtl

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[/] [pci/] [tags/] [wb2hpi/] [rtl/] - Rev 154

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