URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

[/] [plasma/] [trunk/] [vhdl/] - Rev 343

Rev	Log message	Author	Age	Path
343	Initial working cache	rhoads	5685d 21h	/plasma/trunk/vhdl
337	Initial attempt at a cache	rhoads	5691d 01h	/plasma/trunk/vhdl
335	Use enable signal for byte_we	rhoads	5732d 20h	/plasma/trunk/vhdl
334	Short time for averaging read signal for 12.5 MHz case	rhoads	5742d 19h	/plasma/trunk/vhdl
333	Updated Altera lpm_ram_dp usage for Cyclone FPGAs	rhoads	5742d 19h	/plasma/trunk/vhdl
332	Updated Altera lpm_ram_dp	rhoads	5742d 19h	/plasma/trunk/vhdl
331	Commented out unconnected signals	rhoads	5803d 19h	/plasma/trunk/vhdl
329	Fix interrupt line comment	rhoads	5894d 18h	/plasma/trunk/vhdl
288	Added Ethernet MAC with DMA	rhoads	6021d 17h	/plasma/trunk/vhdl
287	Added ethernet and flash control	rhoads	6021d 17h	/plasma/trunk/vhdl
286	Added eth_dma	rhoads	6021d 17h	/plasma/trunk/vhdl
285	Added eth_dma	rhoads	6021d 19h	/plasma/trunk/vhdl
284	Removed unsupported branch likely opcodes	rhoads	6021d 19h	/plasma/trunk/vhdl
280	Fix comment	rhoads	6038d 17h	/plasma/trunk/vhdl
279	Expand read buffer size to two characters	rhoads	6038d 17h	/plasma/trunk/vhdl
278	Fix refresh bug	rhoads	6038d 17h	/plasma/trunk/vhdl
273	For DDR support	rhoads	6060d 06h	/plasma/trunk/vhdl
265	Changed write_byte_enable to byte_we	rhoads	6065d 03h	/plasma/trunk/vhdl
264	Latch address and byte_we in mem_ctrl.vhd	rhoads	6065d 03h	/plasma/trunk/vhdl
263	Changed write_byte_enable to byte_we	rhoads	6065d 03h	/plasma/trunk/vhdl