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Rev Log message Author Age Path
21 Upgrade the example design to use a 60 MHz system clock skordal 3324d 05h /potato
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.		 skordal 3324d 05h /potato
19 SHA256 benchmark: allow compiler to inline at will skordal 3324d 05h /potato
18 instr_misalign_check: add do_jump to sensitivity list skordal 3326d 05h /potato
17 Improve detection of unaligned instructions skordal 3330d 12h /potato
16 Correct grammar in source code comment skordal 3330d 12h /potato
15 SHA256 benchmark: fix Makefile syntax error skordal 3337d 05h /potato
14 Improve detection of invalid instructions skordal 3337d 06h /potato
13 Add SHA256 benchmark code skordal 3337d 10h /potato
12 Update example design with correct bug-report URL and testbenches skordal 3337d 12h /potato
11 Correct FIFO file header skordal 3337d 13h /potato
10 Add missing FIFO module skordal 3342d 06h /potato
9 Remove dependency on a non-existent target in the Makefile skordal 3342d 06h /potato
8 Clarify instruction ROM naming in the example design README skordal 3349d 09h /potato
7 Add test design for the Nexys 4 board from Digilent skordal 3349d 09h /potato
6 Add ISA tests skordal 3349d 09h /potato
5 Update the README, remove .md extension skordal 3351d 15h /potato
4 Add license skordal 3351d 15h /potato
3 Fix bug reporting URL skordal 3351d 15h /potato
2 Initial commit skordal 3351d 17h /potato

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