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Rev Log message Author Age Path
21 Upgrade the example design to use a 60 MHz system clock skordal 3328d 15h /potato/trunk
20 Fix SHA256 benchmark crash by storing all registers on exception handler entry

This problem will disappear when the processor is updated to conform to the
new supervisor specification, which will allow us to use a compiler that
conforms to the new "official" ABI.		 skordal 3328d 15h /potato/trunk
19 SHA256 benchmark: allow compiler to inline at will skordal 3328d 15h /potato/trunk
18 instr_misalign_check: add do_jump to sensitivity list skordal 3330d 15h /potato/trunk
17 Improve detection of unaligned instructions skordal 3334d 22h /potato/trunk
16 Correct grammar in source code comment skordal 3334d 22h /potato/trunk
15 SHA256 benchmark: fix Makefile syntax error skordal 3341d 15h /potato/trunk
14 Improve detection of invalid instructions skordal 3341d 16h /potato/trunk
13 Add SHA256 benchmark code skordal 3341d 20h /potato/trunk
12 Update example design with correct bug-report URL and testbenches skordal 3341d 22h /potato/trunk
11 Correct FIFO file header skordal 3341d 23h /potato/trunk
10 Add missing FIFO module skordal 3346d 17h /potato/trunk
9 Remove dependency on a non-existent target in the Makefile skordal 3346d 17h /potato/trunk
8 Clarify instruction ROM naming in the example design README skordal 3353d 19h /potato/trunk
7 Add test design for the Nexys 4 board from Digilent skordal 3353d 19h /potato/trunk
6 Add ISA tests skordal 3353d 19h /potato/trunk
5 Update the README, remove .md extension skordal 3356d 01h /potato/trunk
4 Add license skordal 3356d 01h /potato/trunk
3 Fix bug reporting URL skordal 3356d 01h /potato/trunk
2 Initial commit skordal 3356d 03h /potato/trunk

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