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[/] [t48/] [tags/] [rel_0_6_beta/] [sw/] - Rev 292

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292 New directory structure. root 5601d 20h /t48/tags/rel_0_6_beta/sw
258 This commit was manufactured by cvs2svn to create tag 'rel_0_6_beta'. 6572d 05h /t48/tags/rel_0_6_beta/sw
185 initial check-in arniml 6881d 08h /t48/tags/rel_0_6_beta/sw
184 initial check-in arniml 6881d 10h /t48/tags/rel_0_6_beta/sw
173 testcase for bug report
"MSB of Program Counter changed upon PC increment"		 arniml 6972d 11h /t48/tags/rel_0_6_beta/sw
141 disable external memory to avoid conflicts with outl a, bus arniml 7198d 11h /t48/tags/rel_0_6_beta/sw
132 stop simulation upon assertion error arniml 7242d 06h /t48/tags/rel_0_6_beta/sw
131 update arniml 7242d 06h /t48/tags/rel_0_6_beta/sw
130 initial check-in arniml 7242d 06h /t48/tags/rel_0_6_beta/sw
127 + log status of A11 properly during interrupt routines
+ trigger counter on negative edge of T1 instead of positive edge		 arniml 7311d 18h /t48/tags/rel_0_6_beta/sw
126 + specify hex file for external ROM on i8039 command line
+ support for no_dump_compare file in test cell		 arniml 7311d 18h /t48/tags/rel_0_6_beta/sw
125 exclude from dump compare arniml 7311d 18h /t48/tags/rel_0_6_beta/sw
124 fix wrong handling of MB after return from interrupt arniml 7312d 15h /t48/tags/rel_0_6_beta/sw
123 support hex file for external ROM arniml 7312d 16h /t48/tags/rel_0_6_beta/sw
122 test MB after return from interrupt arniml 7312d 16h /t48/tags/rel_0_6_beta/sw
118 test MB/interrupt behaviour according to bug report
"Program Memory bank can be switched during interrupt"		 arniml 7315d 09h /t48/tags/rel_0_6_beta/sw
113 generate two ROM files based on address:
+ 0 - 2047 : 2k internal ROM
+ 2048 - 4095 : 2k external ROM		 arniml 7355d 19h /t48/tags/rel_0_6_beta/sw
104 add white_box directory to test suite arniml 7359d 15h /t48/tags/rel_0_6_beta/sw
102 update for changes in address space of external memory arniml 7359d 15h /t48/tags/rel_0_6_beta/sw
99 initial check-in arniml 7359d 16h /t48/tags/rel_0_6_beta/sw

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