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[/] [t48/] [tags/] [rel_1_1/] [sw/] - Rev 141

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Rev Log message Author Age Path
141 disable external memory to avoid conflicts with outl a, bus arniml 7201d 06h /t48/tags/rel_1_1/sw
132 stop simulation upon assertion error arniml 7245d 01h /t48/tags/rel_1_1/sw
131 update arniml 7245d 01h /t48/tags/rel_1_1/sw
130 initial check-in arniml 7245d 01h /t48/tags/rel_1_1/sw
127 + log status of A11 properly during interrupt routines
+ trigger counter on negative edge of T1 instead of positive edge		 arniml 7314d 13h /t48/tags/rel_1_1/sw
126 + specify hex file for external ROM on i8039 command line
+ support for no_dump_compare file in test cell		 arniml 7314d 13h /t48/tags/rel_1_1/sw
125 exclude from dump compare arniml 7314d 13h /t48/tags/rel_1_1/sw
124 fix wrong handling of MB after return from interrupt arniml 7315d 11h /t48/tags/rel_1_1/sw
123 support hex file for external ROM arniml 7315d 11h /t48/tags/rel_1_1/sw
122 test MB after return from interrupt arniml 7315d 11h /t48/tags/rel_1_1/sw
118 test MB/interrupt behaviour according to bug report
"Program Memory bank can be switched during interrupt"		 arniml 7318d 04h /t48/tags/rel_1_1/sw
113 generate two ROM files based on address:
+ 0 - 2047 : 2k internal ROM
+ 2048 - 4095 : 2k external ROM		 arniml 7358d 14h /t48/tags/rel_1_1/sw
104 add white_box directory to test suite arniml 7362d 10h /t48/tags/rel_1_1/sw
102 update for changes in address space of external memory arniml 7362d 10h /t48/tags/rel_1_1/sw
99 initial check-in arniml 7362d 11h /t48/tags/rel_1_1/sw
97 initial check-in arniml 7362d 11h /t48/tags/rel_1_1/sw
96 select dedicated directorie(s) for regression arniml 7363d 09h /t48/tags/rel_1_1/sw
95 check counter inactivity arniml 7363d 09h /t48/tags/rel_1_1/sw
94 initial check-in arniml 7363d 09h /t48/tags/rel_1_1/sw
90 intial check-in arniml 7363d 10h /t48/tags/rel_1_1/sw

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