OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_1] - Rev 163

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
163 add bug
Wrong clock applied to T0		 arniml 7010d 19h /t48/tags/rel_1_1
162 Fix bug report:
"Wrong clock applied to T0"
t0_o is generated inside clock_ctrl with a separate flip-flop running
with xtal_i		 arniml 7010d 19h /t48/tags/rel_1_1
161 fix syntax problem that triggers an error with GHDL 0.18 arniml 7042d 00h /t48/tags/rel_1_1
160 add others to case statement arniml 7162d 20h /t48/tags/rel_1_1
159 fix dependencies for tb_t8048_behav_c0 and tb_t8039_behav_c0 arniml 7162d 20h /t48/tags/rel_1_1
158 added hierarchies t8039_notri and t8048_notri arniml 7162d 20h /t48/tags/rel_1_1
157 removed obsolete constant arniml 7162d 20h /t48/tags/rel_1_1
156 added hierarchy t8039_notri arniml 7162d 20h /t48/tags/rel_1_1
155 initial check-in arniml 7162d 20h /t48/tags/rel_1_1
154 added t8039_notri hierarchy arniml 7162d 20h /t48/tags/rel_1_1
153 introduced generic gate_port_input_g
forces masking of P1 and P2 input bus		 arniml 7163d 18h /t48/tags/rel_1_1
152 added hierarchy t8048_notri and system components package arniml 7164d 08h /t48/tags/rel_1_1
151 added hierarchy t8048_notri and components package for t48 systems arniml 7164d 08h /t48/tags/rel_1_1
150 intruduced hierarchy t8048_notri where all system functionality
except bidirectional ports is handled		 arniml 7164d 16h /t48/tags/rel_1_1
149 update arniml 7164d 17h /t48/tags/rel_1_1
148 initial check-in arniml 7164d 17h /t48/tags/rel_1_1
147 initial check-in for release 0.5 BETA arniml 7200d 18h /t48/tags/rel_1_1
146 add bug
RD' and WR' not asserted for INS A, BUS and OUTL BUS, A		 arniml 7201d 18h /t48/tags/rel_1_1
145 remove PROG and end of XTAL2, see comment for details arniml 7201d 19h /t48/tags/rel_1_1
144 delay db_dir_o by one machine cycle
this fixes the timing relation between BUS data and WR'		 arniml 7201d 19h /t48/tags/rel_1_1

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.