URL https://opencores.org/ocsvn/versatile_fifo/versatile_fifo/trunk

Subversion Repositories versatile_fifo

[/] [versatile_fifo/] - Rev 30

Rev	Log message	Author	Age	Path
30	port map	unneback	5054d 00h	/versatile_fifo
29	ACTEL syn define	unneback	5061d 22h	/versatile_fifo
28	ACTEL async dual way FIFO	unneback	5069d 07h	/versatile_fifo
27	initial commit, dual way simplex FIFO	unneback	5069d 23h	/versatile_fifo
26	added ACTEL synthesis directive as define, +ACTEL	unneback	5069d 23h	/versatile_fifo
25	DFF SR as separate logic	unneback	5209d 18h	/versatile_fifo
24	updated fifo interfaces with re/rd and we/wr	unneback	5210d 09h	/versatile_fifo
23		unneback	5212d 21h	/versatile_fifo
22	async fifo with multiple queues	unneback	5212d 22h	/versatile_fifo
21	added DFF SR	unneback	5226d 19h	/versatile_fifo
20		unneback	5227d 02h	/versatile_fifo
19	DFF with async clear and set for Altera cycloneIV	unneback	5228d 09h	/versatile_fifo
18	ADDR and DATA width set to 8 resp 32	unneback	5228d 22h	/versatile_fifo
17	based on updated versatile counter	unneback	5232d 21h	/versatile_fifo
16	changed power of two style	unneback	5496d 07h	/versatile_fifo
15	doc updated gray_counter_defines added dual port RAM updated	unneback	5500d 00h	/versatile_fifo
14	added PDF	unneback	5544d 07h	/versatile_fifo
13	adr update	unneback	5545d 09h	/versatile_fifo
12	no mux on dual port mem read	unneback	5558d 02h	/versatile_fifo
11	name conflict wptr1 changed to wptr1_cnt etc	unneback	5558d 05h	/versatile_fifo