URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [tags/] [Rev2/] [rtl/] - Rev 109

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Rev	Log message	Author	Age	Path
109	Rev2 from trunk	unneback	4705d 02h	/versatile_mem_ctrl/tags/Rev2/rtl
107	corrected signal type for ba	unneback	4861d 06h	/versatile_mem_ctrl/trunk/rtl
106	added texinfo User guide and updated fsm	unneback	4878d 17h	/versatile_mem_ctrl/trunk/rtl
105	versatile_mem modules naming	unneback	4886d 00h	/versatile_mem_ctrl/trunk/rtl
104	versatile_mem modules naming	unneback	4886d 00h	/versatile_mem_ctrl/trunk/rtl
102	cleaning up	unneback	4917d 00h	/versatile_mem_ctrl/trunk/rtl
101	cleaning up	unneback	4917d 00h	/versatile_mem_ctrl/trunk/rtl
100		unneback	4917d 00h	/versatile_mem_ctrl/trunk/rtl
98	updates	unneback	5020d 05h	/versatile_mem_ctrl/trunk/rtl
97	updated tb and sdram16	unneback	5020d 18h	/versatile_mem_ctrl/trunk/rtl
95	new files	unneback	5055d 19h	/versatile_mem_ctrl/trunk/rtl
86		mikaeljf	5127d 07h	/versatile_mem_ctrl/trunk/rtl
85	Added a versatile_mem_ctrl specific version of the flag generation module in the versatile fifo.	mikaeljf	5128d 08h	/versatile_mem_ctrl/trunk/rtl
84		mikaeljf	5132d 06h	/versatile_mem_ctrl/trunk/rtl
82		mikaeljf	5133d 06h	/versatile_mem_ctrl/trunk/rtl
81		mikaeljf	5134d 03h	/versatile_mem_ctrl/trunk/rtl
80		mikaeljf	5134d 04h	/versatile_mem_ctrl/trunk/rtl
79	Added defines that fix bugs with slow wishbone clocks doing burst writes	julius	5171d 17h	/versatile_mem_ctrl/trunk/rtl
78	Burst writing working again, although its mostly hardcoded to burst 4. Also added a fix for when the RAM and bus clocks are about the same speed, to avoid buffer overrun	julius	5174d 00h	/versatile_mem_ctrl/trunk/rtl
77	SDR 16 registering of current_fifo_empty signal in top, appropriate control alterations in fsm_sdr_16	julius	5181d 23h	/versatile_mem_ctrl/trunk/rtl

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Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [tags/] [Rev2/] [rtl/] - Rev 109

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