OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] - Rev 363

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
363 quartus project files unneback 4694d 05h /
362 added Makefiles to build project unneback 4694d 05h /
361 created branch unneback unneback 4694d 05h /
360 Added partial implementation of the debug register from ORPSoC olof 4695d 04h /
359 Verilator linting fixes olof 4697d 06h /
358 Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version olof 4698d 20h /
357 Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC olof 4698d 20h /
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4698d 22h /
355 Import Julius Baxter's verilator hints from ORPSoC olof 4698d 23h /
354 Whitespace cleanup olof 4698d 23h /
353 Inherit fixes for bit width of constants from ORPSoC olof 4701d 01h /
352 Removed delayed assignments from rtl code olof 4705d 07h /
351 Turn defines into parameters in eth_cop olof 4713d 21h /
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4713d 21h /
349 Make all parameters configurable from top level olof 4714d 22h /
348 Added option to dump VCD files olof 4715d 21h /
347 Added information about running with Icarus Verilog olof 4715d 21h /
346 Updated project location olof 4715d 23h /
345 Temporarily disable failing tests olof 4716d 01h /
344 bit 9 in phy control register is self clearing olof 4722d 03h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.