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Rev Log message Author Age Path
66 Added fsl_tag_o to FSL bus (tag either address or data). sybreon 6114d 03h /
65 Fixed minor typo causing synthesis failure. sybreon 6115d 16h /
64 Fixed minor interrupt test typo. sybreon 6116d 02h /
63 Fixed interrupt signal synchronisation. sybreon 6116d 02h /
62 Fixed minor typo. sybreon 6116d 02h /
61 Changed interrupt handling system (reported by M. Ettus). sybreon 6116d 03h /
60 Added interrupt test routine. sybreon 6116d 03h /
59 Added posedge/negedge bus interface.
Modified interrupt test system.
sybreon 6116d 03h /
58 Updated simulation to also check BRI 0x00 instruction. sybreon 6117d 02h /
57 Updated documentation to EDK32 version. sybreon 6119d 03h /
56 Parameterised optional components into aeMB_xecu.v sybreon 6120d 01h /
55 Upgraded license to LGPLv3.
Significant performance optimisations.
sybreon 6120d 09h /
54 Added some compilation optimisations. sybreon 6121d 04h /
53 Added GET/PUT support through a FSL bus. sybreon 6121d 04h /
52 Added log output to iverilog.log sybreon 6121d 04h /
51 Fixed data WISHBONE arbitration problem (reported by J Lee). sybreon 6122d 08h /
50 Parameterised optional components. sybreon 6122d 11h /
49 Added random seed for simulation. sybreon 6125d 14h /
48 Fixed spurious interrupt latching during long bus cycles (spotted by J Lee). sybreon 6126d 20h /
47 Added -msoft-float and -mxl-soft-div compiler flags. sybreon 6126d 20h /

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