OpenCores
URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] - Rev 71

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
71 Old version deprecated. sybreon 6078d 07h /
70 Change interrupt to positive level triggered interrupts. sybreon 6079d 06h /
69 Removed unnecessary byte acrobatics with VMEM data. sybreon 6081d 02h /
68 Generate VMEM instead of HEX dumps of programme. sybreon 6081d 02h /
67 Minor simulation fixes. sybreon 6083d 01h /
66 Added fsl_tag_o to FSL bus (tag either address or data). sybreon 6084d 23h /
65 Fixed minor typo causing synthesis failure. sybreon 6086d 12h /
64 Fixed minor interrupt test typo. sybreon 6086d 21h /
63 Fixed interrupt signal synchronisation. sybreon 6086d 21h /
62 Fixed minor typo. sybreon 6086d 22h /
61 Changed interrupt handling system (reported by M. Ettus). sybreon 6086d 23h /
60 Added interrupt test routine. sybreon 6086d 23h /
59 Added posedge/negedge bus interface.
Modified interrupt test system.
sybreon 6086d 23h /
58 Updated simulation to also check BRI 0x00 instruction. sybreon 6087d 21h /
57 Updated documentation to EDK32 version. sybreon 6089d 23h /
56 Parameterised optional components into aeMB_xecu.v sybreon 6090d 21h /
55 Upgraded license to LGPLv3.
Significant performance optimisations.
sybreon 6091d 04h /
54 Added some compilation optimisations. sybreon 6092d 00h /
53 Added GET/PUT support through a FSL bus. sybreon 6092d 00h /
52 Added log output to iverilog.log sybreon 6092d 00h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.