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Rev Log message Author Age Path
19 no message bbeaver 8299d 07h /
18 no message bbeaver 8300d 05h /
17 Fixed link to specification_template.dot lampret 8300d 13h /
16 Added updated opencores coding guidelines. Added ver_plan.pdf and Specification template for Word. lampret 8300d 14h /
15 no message bbeaver 8320d 11h /
14 adding beginning LPM files bbeaver 8332d 07h /
13 This commit was manufactured by cvs2svn to create tag 'initial'. 8338d 07h /
12 Major cleanup.
Files are now compliant to Altera & Xilinx memories.
Memories are now compatible, i.e. drop-in replacements.
Added synthesizeable generic FPGA description.
Created "generic_memories" cvs entry.
rherveille 8338d 07h /
11 no message bbeaver 8345d 05h /
10 no message bbeaver 8345d 06h /
9 no message bbeaver 8349d 04h /
8 no message bbeaver 8349d 04h /
7 no message bbeaver 8349d 04h /
6 no message bbeaver 8349d 05h /
5 no message bbeaver 8349d 06h /
4 no message bbeaver 8349d 06h /
3 This commit was manufactured by cvs2svn to create tag 'arelease'. 8349d 07h /
2 no message bbeaver 8349d 07h /
1 Standard project directories initialized by cvs2svn. 8349d 07h /

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