URL https://opencores.org/ocsvn/common/common/trunk

Subversion Repositories common

[/] - Rev 29

Rev	Log message	Author	Age	Path
29	got timing checks mostly correct No functional stuff yet	bbeaver	8353d 09h	/
28	no message	bbeaver	8354d 10h	/
27	no message	bbeaver	8355d 09h	/
26	no message	bbeaver	8356d 08h	/
25	no message	bbeaver	8357d 10h	/
24	no message	bbeaver	8359d 11h	/
23	no message	bbeaver	8360d 11h	/
22	no message	bbeaver	8360d 14h	/
21	Added bookmarks.	lampret	8361d 03h	/
20	Some minor fixes. Document is now official version.	lampret	8361d 04h	/
19	no message	bbeaver	8362d 12h	/
18	no message	bbeaver	8363d 10h	/
17	Fixed link to specification_template.dot	lampret	8363d 18h	/
16	Added updated opencores coding guidelines. Added ver_plan.pdf and Specification template for Word.	lampret	8363d 19h	/
15	no message	bbeaver	8383d 16h	/
14	adding beginning LPM files	bbeaver	8395d 12h	/
13	This commit was manufactured by cvs2svn to create tag 'initial'.		8401d 12h	/
12	Major cleanup. Files are now compliant to Altera & Xilinx memories. Memories are now compatible, i.e. drop-in replacements. Added synthesizeable generic FPGA description. Created "generic_memories" cvs entry.	rherveille	8401d 12h	/
11	no message	bbeaver	8408d 10h	/
10	no message	bbeaver	8408d 10h	/