URL https://opencores.org/ocsvn/common/common/trunk

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[/] - Rev 31

Rev	Log message	Author	Age	Path
31	no message	bbeaver	8317d 11h	/
30	no message	bbeaver	8318d 09h	/
29	got timing checks mostly correct No functional stuff yet	bbeaver	8318d 10h	/
28	no message	bbeaver	8319d 10h	/
27	no message	bbeaver	8320d 10h	/
26	no message	bbeaver	8321d 09h	/
25	no message	bbeaver	8322d 11h	/
24	no message	bbeaver	8324d 12h	/
23	no message	bbeaver	8325d 11h	/
22	no message	bbeaver	8325d 15h	/
21	Added bookmarks.	lampret	8326d 04h	/
20	Some minor fixes. Document is now official version.	lampret	8326d 05h	/
19	no message	bbeaver	8327d 12h	/
18	no message	bbeaver	8328d 10h	/
17	Fixed link to specification_template.dot	lampret	8328d 19h	/
16	Added updated opencores coding guidelines. Added ver_plan.pdf and Specification template for Word.	lampret	8328d 19h	/
15	no message	bbeaver	8348d 16h	/
14	adding beginning LPM files	bbeaver	8360d 12h	/
13	This commit was manufactured by cvs2svn to create tag 'initial'.		8366d 13h	/
12	Major cleanup. Files are now compliant to Altera & Xilinx memories. Memories are now compatible, i.e. drop-in replacements. Added synthesizeable generic FPGA description. Created "generic_memories" cvs entry.	rherveille	8366d 13h	/