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Rev Log message Author Age Path
188 Added a generic to alter the behavior of RTI so that it can optionally skip restoring the general purpose flags GP4 to GP7, allowing ISR's to make persistent changes to them. Also exported these flags to the top level for use outside the CPU. jshamlet 1582d 12h /
187 Added the CPU_Halt input, only now as an input to the instruction decoder. The CPU_Halt line will assert the registered CPU_Halt_Req, which will cause the instruction decoder to abort the current instruction, reset the PC, then enter a hold state until the line is deasserted. Additionally, a very minor bug that could cause the SMSK instruction to effectively execute twice if interrupted was fixed. Lastly, cleaned up the comments even more. jshamlet 1584d 09h /
186 Merged the interrupt override logic into the case structure, simplifying how interrupts are processed. jshamlet 1587d 08h /
185 1) Fixed an apparently long-standing bug where the interrupt bit wasn't being cleared after an RTI
2) Modified the program counter logic to be simpler. It now always increments, and states control the increment using the offset field. A new set of constants was added to replace the old states.
3) Modified the ALU to always use Operand1 instead of ALU_Ctrl.Data (and removed the field in the record). A new ALU command, ALU_GMSK, was added, as it was the only instruction to set the .Data field to something other than Operand1 (Int_Mask)
4) Modified the package file so that flag names match what the assembler calls them. FL_Z is now PSR_Z, FL_GP1 is now PSR_GP4, etc.
5) Cleaned up the comments and code formatting
jshamlet 1587d 11h /
184 More file/entity renaming to match private versions. jshamlet 1589d 11h /
183 Renamed core to o8_cpu to match new naming scheme jshamlet 1589d 11h /
182 Simplified the address generation logic at the expense of making LDX take one additional clock cycle. This allowed the address logic to be split out of the main state machine and simplified (greatly). During this process, a bug in SDO was found and fixed that caused it to return through the wrong pipe fill state wnen auto increment was disabled. jshamlet 1589d 11h /
181 Altered the RSP instruction to allow the stack pointed to either be restored from registers or stored to registers based on the status of a processor bit. Also modified LDX to simplify the address logic. jshamlet 1590d 08h /
180 Added additional Open8 compatible modules jshamlet 1594d 11h /
179 Replacing files accidentally deleted during check-in jshamlet 1604d 07h /
178 Adding Open8 toolset for pure assembly jshamlet 1604d 07h /
177 Fixed comments in RTC module jshamlet 2914d 12h /
176 Fixed documentation errors,
Modified uSec_Tick such that it is always generated regardless of the interval.
jshamlet 2919d 09h /
175 Added 4 and 8-bit LCD interfaces with backlight and contrast DACs jshamlet 2919d 14h /
174 Added ROM/RAM wrappers jshamlet 3114d 09h /
173 Added a couple of useful interfaces for detecting button presses and clock changes. jshamlet 3114d 09h /
172 General code cleanup jshamlet 3114d 09h /
171 Fixed comments for offsets 0x0 - 0x3 to indicate the read value jshamlet 3114d 09h /
170 Added 24-bit resolution epoch timer / alarm clock jshamlet 3114d 09h /
169 Corrected issue with CMP and SBC generating an inverted carry flag and added new constants to the package file to simplify interfacing new modules. jshamlet 3169d 10h /

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