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Rev Log message Author Age Path
316 More code cleanup and comments,
Removed INT_VECTOR_n constants, as they are superfluous. There are no reasonable situations in which the constants would be altered.		 jshamlet 397d 04h /
315 Added Terasic DE0 Nano ADC interface and rolling averager. jshamlet 397d 05h /
314 Code cleanup and added comments jshamlet 397d 06h /
313 Added all generics to package component jshamlet 397d 07h /
312 Added o8_timer24.vhd as a more flexible alternative to o8_sys_timer_ii.vhd.
Also cleaned up some comments in the HTML documentation		 jshamlet 397d 07h /
311 Updated documentation to reflect generic switch controlling ROR/ROL behavior and the carry bit jshamlet 441d 04h /
310 Added optional DACadv signal to advance the PWM engine using an external signal. This is used to synchronize the DAC with other DACs or for streaming multiple streams across a high-speed serial link. jshamlet 468d 09h /
309 Comment cleanup jshamlet 478d 16h /
308 jshamlet 489d 23h /
307 Fixed comments on o8_version.vhd jshamlet 697d 09h /
306 Moved REINIT_TASK_TABLE_PTR call to INITIALIZE_TASK_STACK jshamlet 701d 10h /
305 More code cleanup - rearranged macros and moved stack init to separate macro jshamlet 701d 10h /
304 Modified TASK_SETUP to use the same macros as the rest of the task switcher and cleaned up the code some more. jshamlet 701d 11h /
303 Fixed working, but "incorrect" code (constants were right, but were named incorrectly jshamlet 701d 22h /
302 Corrected issue where register state wasn't being preserved for user function stubs,
Modified FREEMEM calc to use the region size constant.		 jshamlet 701d 23h /
301 Adding actual task manager files jshamlet 703d 20h /
300 Adding core task manager assembly jshamlet 703d 20h /
299 Modified the status_led.vhd to slow down the DIM50PCT signal to 1/32 instead of 1/2 for use with shift-register based discrete LEDs and added the ability to chain the toggle signal to save on resources as well as synchronize the "toggling" jshamlet 705d 20h /
298 Fixed a long-standing bug in the SBC instruction where the 1 wasn't being added to complete the 2's complement of Rn. This was causing off-by-one errors in subtraction and negating carry only subtractions. jshamlet 706d 23h /
297 Fixed register map comments jshamlet 997d 07h /

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