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Rev Log message Author Age Path
18 search_control is up for simulation (ghdl) stvhawes 3343d 09h /
17 persistent bug: search_control_wrapper.vhd:230:21:@36us:(assertion error): search_control_wrapper: test: 3 bad id stvhawes 3348d 20h /
16 minor fixes to search_control test bench stvhawes 3355d 06h /
15 adding in search_control and testbench stvhawes 3356d 11h /
14 search_item_wrapper bench debugged stvhawes 3362d 07h /
13 test bench for search_item stvhawes 3365d 11h /
12 wrapper test for search_item stvhawes 3370d 21h /
11 multiplex searh item added stvhawes 3371d 14h /
10 split source files to sime and rtl stvhawes 3385d 13h /
9 highlevel block diagram added stvhawes 3386d 09h /
8 sim sequence error fixed, so 20% success -> 100% success for unit test on fpga stvhawes 3386d 11h /
7 split clock/byte_ready and fix logic stvhawes 3391d 05h /
6 fixing synthesizable stvhawes 3392d 13h /
5 fixing synthesizable stvhawes 3392d 18h /
4 developing ideas around unit test / fpga verification stvhawes 3393d 06h /
3 developing ideas around unit test / fpga verification stvhawes 3393d 06h /
2 initial sources, wrappers for regression test harness stvhawes 3404d 09h /
1 The project and the structure was created root 3406d 03h /

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