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[/] - Rev 1192

Rev	Log message	Author	Age	Path
1192	disabled 'bench_defines.v' during synthesis + added define to specify usage of flash instruction address	dries	7642d 14h	/
1191	disabled 'bench_defines.v' during synthesis + added define to specify usage of flash instruction address	dries	7642d 14h	/
1190	This commit was manufactured by cvs2svn to create tag 'rel_14'.		7658d 13h	/
1189	This commit was manufactured by cvs2svn to create tag 'rel_13'.		7658d 13h	/
1188	Added support for rams with byte write access.	simons	7658d 13h	/
1187	This commit was manufactured by cvs2svn to create tag 'rel_12'.		7659d 12h	/
1186	Added support for rams with byte write access.	simons	7659d 12h	/
1185	This commit was manufactured by cvs2svn to create tag 'rel_11'.		7666d 05h	/
1184	Scan signals mess fixed.	simons	7666d 05h	/
1183	OpenRISC port of gdb-5.3 straightforwardly derived from gdb-5.0	sfurman	7670d 20h	/
1182	This commit was manufactured by cvs2svn to create tag 'VER_5_3'.		7670d 22h	/
1181	Initial import of unmodified gdb-5.3 source on vendor branch	sfurman	7670d 22h	/
1180	This commit was manufactured by cvs2svn to create tag 'rel_10'.		7674d 08h	/
1179	BIST interface added for Artisan memory instances.	simons	7674d 08h	/
1178	avoid another immu exception that should not happen	phoenix	7703d 19h	/
1177	more informative output	phoenix	7705d 02h	/
1176	Added comments.	damonb	7705d 17h	/
1175	Added three missing wire declarations. No functional changes.	lampret	7705d 20h	/
1174	fix for immu exceptions that never should have happened	phoenix	7706d 21h	/
1173	Added QMEM.	lampret	7708d 05h	/